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參數(shù)資料
| 型號： | ATA555814M01-PP |
| 廠商： | Atmel Corp. |
| 英文描述： | 1 kbit R/W IDIC with Deterministic Anticollision |
| 中文描述： | 1千比特讀/寫的確定性防撞投資業(yè)務(wù) |
| 文件頁數(shù)： | 11/42頁 |
| 文件大?。?/td> | 557K |
| 代理商： | ATA555814M01-PP |
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11
4681C–RFID–09/05
ATA5558 [Preliminary]
Figure 3-2.
SOF Pattern
3.1.2
Public Mode
1.
In Public Mode the cyclic data stream will be preceded by a single SOF pattern after the
completion of the POR delay.
The variable number of preamble data bits is aimed at easing the interrogator design
and optimizing system performance.
Within any closed identification system the preamble length for all tags must be
identical.
2.
3.
3.2
Interrogator to Tag Communication
All commands and data bit streams from the interrogator to the tag are 100% (OOK –
On-Off-Key) modulated using a modified 1 out of 4 pulse position coding. Depending on the
data, the continuous RF field is interspersed with short field gaps of constant duration and vari-
able separation. The time from one gap to the next may take on one of four discrete values.
Each of these represent one of four possible dual bit downlink data codes (
00
..
11
) in the data
stream (see
Figure 3-3
). The downlink data transfer speed is dependent on the downlink data
rate (DDR) bit set in the tag configuration block, so that selected tags can always understand the
interrogator. The minimum write data coding (maximum data rate) is 9 field clocks. This corre-
sponds with the
d
00
(d
ref
)
parameter in
Figure 3-3
and
Table 3-1 on page 12
.
Figure 3-3.
Interrogator to Tag - Modified 1 out of 4 Pulse Position Coding
SOF
2 bit period
code
violation
Example with
p = 4 bit periods
Preamble length = 3
W
gap
S
gap
Downlink mode
Uplink mode
d
00
d
ref
d
01
d
11
d
10
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| ATA555815-DDT | 1 kbit R/W IDIC with Deterministic Anticollision |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ATA555814-PAE | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:1 kbit R/W IDIC with Deterministic Anticollision |
| ATA555814-PP | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:1 kbit R/W IDIC with Deterministic Anticollision |
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| ATA555815-DDT | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:1 kbit R/W IDIC with Deterministic Anticollision |
| ATA555815-DDW | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:1 kbit R/W IDIC with Deterministic Anticollision |
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