參數(shù)資料
型號: ATA555814M01-PP
廠商: Atmel Corp.
英文描述: 1 kbit R/W IDIC with Deterministic Anticollision
中文描述: 1千比特讀/寫的確定性防撞投資業(yè)務(wù)
文件頁數(shù): 35/42頁
文件大?。?/td> 557K
代理商: ATA555814M01-PP
35
4681C–RFID–09/05
ATA5558 [Preliminary]
7.15
ArmClear
A selected tag, when receiving the ArmClear command with the Master Key NOT set to 6 will
prepare the device for a subsequent ClearAll command.
If this command is followed by any command other than a ClearAll, it will become disarmed. In
which case the ArmClear must be repeated before a ClearAll can be successfully executed.
7.16
ClearAll
Tags in the Selected state, if previously armed by the ArmClear command will clear all memory
blocks and their lock bits with the exception of the traceability data blocks (see
Figure 2-3 on
page 4
in “Memory” section).
The ClearAll command includes an EEPROM programming sequence. The maximum EEPROM
programming time is 6 ms. On completion of a successful clear the tag replies with a single SOF
pattern.
If for any reason the clear operation fails, the tag will generate the corresponding error code. The
error code bits are dual pattern coded (see
Figure 3-2 on page 11
and
Table 7-2 on page 26
)
and are preceded by a SOF pattern. If the constant downlink checksum CRC_d (if appended) is
incorrect, the clear operation is aborted and an error response is returned immediately.
Table 7-30.
Command
Interrogator Command
Parameter
ArmClear =
00 11 00 10 00
00 00 00
10 bits
6 bits
Table 7-31.
SOF
Tag Response
Start of Frame
3 .. 10-bit period
Table 7-32.
Command
Interrogator Command Parameters
Parameter 1
Parameter 2
Parameter 3
32
×
0
bits
32 bits
CRC (Optional)
ClearAll =
00 01
01 11 11
00
CRC_u = 96ADh
4 bits
6 bits
2 bits
16 bits
Table 7-33.
SOF
Tag Response
Error Flags
Start of Frame
Present on error only
3 .. 10-bit period
4-bit – dual pattern code
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