參數(shù)資料
型號(hào)： AT80C51RD2-SLSUM
廠商： Atmel
文件頁(yè)數(shù)： 9/81頁(yè)
文件大?。?/td> 0K
描述： IC 8051 MCU 5V SPI 20MHZ 44-PLCC
標(biāo)準(zhǔn)包裝： 972
系列： 80C
核心處理器： 8051
芯體尺寸： 8-位
速度： 40MHz
連通性： UART/USART
外圍設(shè)備： POR，PWM，WDT
輸入/輸出數(shù)： 32
程序存儲(chǔ)器類型： ROMless
RAM 容量： 1K x 8
電壓 - 電源 (Vcc/Vdd)： 4.5 V ~ 5.5 V
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 44-PLCC
包裝： 管件
17
4113D–8051–01/09
AT80C51RD2
9.
Timer 2
The Timer 2 in the AT80C51RD2 is the standard C52 Timer 2.
It is a 16-bit timer/counter: the count is maintained by two eight-bit timer registers, TH2 and TL2
are cascaded. It is controlled by T2CON (Table 9-1) and T2MOD (Table 9-2) registers. Timer 2
operation is similar to Timer 0 and Timer 1. C/T2 selects F
OSC/12 (timer operation) or external
pin T2 (counter operation) as the timer clock input. Setting TR2 allows TL2 to be incremented by
the selected input.
Timer 2 has 3 operating modes: capture, auto-reload and Baud Rate Generator. These modes
are selected by the combination of RCLK, TCLK and CP/RL2 (T2CON).
Refer to the Atmel 8-bit Microcontroller Hardware description for Capture and Baud Rate Gen-
erator Modes.
Timer 2 includes the following enhancements:
Auto-reload mode with up or down counter
Programmable clock-output
9.1
Auto-reload Mode
The auto-reload mode configures Timer 2 as a 16-bit timer or event counter with automatic
reload. If DCEN bit in T2MOD is cleared, Timer 2 behaves as in 80C52 (refer to the Atmel 8-bit
Microcontroller Hardware description). If DCEN bit is set, Timer 2 acts as an Up/down
timer/counter as shown in Figure 9-1. In this mode the T2EX pin controls the direction of count.
When T2EX is high, Timer 2 counts up. Timer overflow occurs at FFFFh which sets the TF2 flag
and generates an interrupt request. The overflow also causes the 16-bit value in RCAP2H and
RCAP2L registers to be loaded into the timer registers TH2 and TL2.
When T2EX is low, Timer 2 counts down. Timer underflow occurs when the count in the timer
registers TH2 and TL2 equals the value stored in RCAP2H and RCAP2L registers. The under-
flow sets TF2 flag and reloads FFFFh into the timer registers.
The EXF2 bit toggles when Timer 2 overflows or underflows according to the direction of the
count. EXF2 does not generate any interrupt. This bit can be used to provide 17-bit resolution.
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