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    參數(shù)資料
    型號: AT80C51RD2-SLSUM
    廠商: Atmel
    文件頁數(shù): 13/81頁
    文件大小: 0K
    描述: IC 8051 MCU 5V SPI 20MHZ 44-PLCC
    標準包裝: 972
    系列: 80C
    核心處理器: 8051
    芯體尺寸: 8-位
    速度: 40MHz
    連通性: UART/USART
    外圍設(shè)備: POR,PWM,WDT
    輸入/輸出數(shù): 32
    程序存儲器類型: ROMless
    RAM 容量: 1K x 8
    電壓 - 電源 (Vcc/Vdd): 4.5 V ~ 5.5 V
    振蕩器型: 內(nèi)部
    工作溫度: -40°C ~ 85°C
    封裝/外殼: 44-PLCC
    包裝: 管件
    20
    4113D–8051–01/09
    AT80C51RD2
    Reset Value = 0000 0000b
    Bit addressable
    Bit
    Number
    Bit
    Mnemonic
    Description
    7TF2
    Timer 2 overflow Flag
    Must be cleared by software.
    Set by hardware on Timer 2 overflow, if RCLK = 0 and TCLK = 0.
    6EXF2
    Timer 2 External Flag
    Set when a capture or a reload is caused by a negative transition on T2EX pin if
    EXEN2 = 1.
    When set, causes the CPU to vector to Timer 2 interrupt routine when Timer 2 interrupt
    is enabled.
    Must be cleared by software. EXF2 doesn’t cause an interrupt in Up/down counter
    mode (DCEN = 1)
    5
    RCLK
    Receive Clock bit
    Cleared to use timer 1 overflow as receive clock for serial port in mode 1 or 3.
    Set to use Timer 2 overflow as receive clock for serial port in mode 1 or 3.
    4TCLK
    Transmit Clock bit
    Cleared to use timer 1 overflow as transmit clock for serial port in mode 1 or 3.
    Set to use Timer 2 overflow as transmit clock for serial port in mode 1 or 3.
    3
    EXEN2
    Timer 2 External Enable bit
    Cleared to ignore events on T2EX pin for Timer 2 operation.
    Set to cause a capture or reload when a negative transition on T2EX pin is detected, if
    Timer 2 is not used to clock the serial port.
    2TR2
    Timer 2 Run control bit
    Cleared to turn off Timer 2.
    Set to turn on Timer 2.
    1C/T2#
    Timer/Counter 2 select bit
    Cleared for timer operation (input from internal clock system: F
    CLK PERIPH).
    Set for counter operation (input from T2 input pin, falling edge trigger). Must be 0 for
    clock out mode.
    0CP/RL2#
    Timer 2 Capture/Reload bit
    If RCLK = 1 or TCLK = 1, CP/RL2# is ignored and timer is forced to auto-reload on
    Timer 2 overflow.
    Cleared to auto-reload on Timer 2 overflows or negative transitions on T2EX pin if
    EXEN2 = 1.
    Set to capture on negative transitions on T2EX pin if EXEN2 = 1.
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