參數(shù)資料
型號(hào): AT80C51RD2-SLSUM
廠商: Atmel
文件頁(yè)數(shù): 31/81頁(yè)
文件大?。?/td> 0K
描述: IC 8051 MCU 5V SPI 20MHZ 44-PLCC
標(biāo)準(zhǔn)包裝: 972
系列: 80C
核心處理器: 8051
芯體尺寸: 8-位
速度: 40MHz
連通性: UART/USART
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 32
程序存儲(chǔ)器類型: ROMless
RAM 容量: 1K x 8
電壓 - 電源 (Vcc/Vdd): 4.5 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-PLCC
包裝: 管件
37
4113D–8051–01/09
AT80C51RD2
11.2.3
Reset Addresses
On reset, the SADDR and SADEN registers are initialized to 00h, i.e. the given and broadcast
addresses are
XXXX XXXXb (all don’t-care bits). This ensures that the serial port will reply to any
address, and so, that it is backwards compatible with the 80C51 microcontrollers that do not
support automatic address recognition.
Table 11-1.
SADEN Register
SADEN - Slave Address Mask Register (B9h)
Reset Value = 0000 0000b
Not bit addressable
Table 11-2.
SADDR Register
SADDR - Slave Address Register (A9h)
Reset Value = 0000 0000b
Not bit addressable
11.3
Baud Rate Selection for UART for Mode 1 and 3
The Baud Rate Generator for transmit and receive clocks can be selected separately via the
T2CON and BDRCON registers.
Figure 11-4. Baud Rate selection
765
4321
0
765
4321
0
RCLK
/ 16
RBCK
INT_BRG
0
1
TIMER1
0
1
0
1
TIMER2
INT_BRG
TIMER1
TIMER2
TIMER_BRG_RX
Rx Clock
/ 16
0
1
TIMER_BRG_TX
Tx Clock
TBCK
TCLK
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