參數(shù)資料
型號: AT80C51RD2-SLSUM
廠商: Atmel
文件頁數(shù): 39/81頁
文件大?。?/td> 0K
描述: IC 8051 MCU 5V SPI 20MHZ 44-PLCC
標準包裝: 972
系列: 80C
核心處理器: 8051
芯體尺寸: 8-位
速度: 40MHz
連通性: UART/USART
外圍設備: POR,PWM,WDT
輸入/輸出數(shù): 32
程序存儲器類型: ROMless
RAM 容量: 1K x 8
電壓 - 電源 (Vcc/Vdd): 4.5 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-PLCC
包裝: 管件
44
4113D–8051–01/09
AT80C51RD2
Table 11-13. BDRCON Register
BDRCON - Baud Rate Control Register (9Bh)
Reset Value = XXX0 0000b
Not bit addressable
765
4321
0
-
BRR
TBCK
RBCK
SPD
SRC
Bit
Number
Bit
Mnemonic
Description
7-
Reserved
The value read from this bit is indeterminate. Do not set this bit
6-
Reserved
The value read from this bit is indeterminate. Do not set this bit
5-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
4BRR
Baud Rate Run Control bit
Cleared to stop the internal Baud Rate Generator.
Set to start the internal Baud Rate Generator.
3TBCK
Transmission Baud rate Generator Selection bit for UART
Cleared to select Timer 1 or Timer 2 for the Baud Rate Generator.
Set to select internal Baud Rate Generator.
2RBCK
Reception Baud Rate Generator Selection bit for UART
Cleared to select Timer 1 or Timer 2 for the Baud Rate Generator.
Set to select internal Baud Rate Generator.
1SPD
Baud Rate Speed Control bit for UART
Cleared to select the SLOW Baud Rate Generator.
Set to select the FAST Baud Rate Generator.
0SRC
Baud Rate Source select bit in Mode 0 for UART
Cleared to select F
OSC/12 as the Baud Rate Generator (FCLK PERIPH/6 in X2 mode).
Set to select the internal Baud Rate Generator for UARTs in mode 0.
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