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參數(shù)資料
| 型號： | AS4LC256K16E0-60JC |
| 廠商： | ALLIANCE SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | 256K X 16 EDO DRAM, 60 ns, PDSO40 |
| 封裝： | 0.400 INCH, PLASTIC, SOJ-40 |
| 文件頁數(shù)： | 20/24頁 |
| 文件大小： | 660K |
| 代理商： | AS4LC256K16E0-60JC |
AS4LC256K16EO
2/25/02; V.1.2
Alliance Semiconductor
P. 5 of 24
:ULWHF\FOH
Read-modify-write cycle
Std Symbol
Parameter
-45
-50
-60
Unit
Notes
MinMax
tASC
Column address setup time
0
–
0
–
0
–
ns
tCAH
Column address hold time
6
–
6
–
10
–
ns
tAWR
Column address hold time to RAS
35
–
35
–
40
–
ns
tWCS
Write command setup time
0
–
0
–
0
–
ns
11
tWCH
Write command hold time
0
–
0
–
0
–
ns
11
tWCR
Write command hold time to RAS
35
–
35
–
40
–
ns
tWP
Write command pulse width
6
–
6
–
10
–
ns
tRWL
Write command to RAS lead time
12
–
12
–
12
–
ns
tCWL
Write command to CAS lead time
12
–
12
–
12
–
ns
tDS
Data-in setup time
0
–
0
–
0
–
ns
12
tDH
Data-in hold time
6
–
6
–
10
–
ns
12
tDHR
Data-in hold time to RAS
35
–
35
–
45
–
ns
Std Symbol Parameter
-45
-50
-60
Unit
Notes
Min
Max
Min
Max
Min
Max
tRWC
Read-write cycle time
115
–
115
–
120
–
ns
tRWD
RAS to WE delay time
58
–
58
–
60
–
ns
11
tCWD
CAS to WE delay time
30
–
30
–
30
–
ns
11
tAWD
Column address to WE delay time
38
–
38
–
40
–
ns
11
tRSH(W) CAS to RAS hold time (write)
10
–
10
–
12
–
ns
tCAS(W)
CAS pulse width (write)
15
–
15
–
15
–
ns
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AS4LC256K16E0-60TC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x16 EDO Page Mode DRAM |
| AS4LC256K16EO | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:3.3V 256K X 16 CMOS DRAM (EDO) |
| AS4LC256K16EO-35 | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:3.3V 256K X 16 CMOS DRAM (EDO) |
| AS4LC256K16EO-35TC | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:3.3V 256K X 16 CMOS DRAM (EDO) |
| AS4LC256K16EO-45TC | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:3.3V 256K X 16 CMOS DRAM (EDO) |
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