參數(shù)資料
型號: AK4665AEN
廠商: Asahi Kasei Microsystems Co.,Ltd
元件分類: Codec
英文描述: 20-Bit Stereo CODEC with MIC/HP-AMP
中文描述: 20位立體聲編解碼器麥克風(fēng)/惠普腺苷
文件頁數(shù): 4/52頁
文件大小: 541K
代理商: AK4665AEN
ASAHI KASEI
[AK4665A]
MS0440-E-01
2006/05
- 4 -
PIN/FUNCTION
No. Pin Name
I/O
Function
1
LRCK
I
L/R Clock Pin
This clock determines which audio channel is currently being output on SDTO pin and
input on SDTI pin.
Master Clock Input Pin
Serial Bit Clock Pin
This clock is used to latch audio data.
Audio Data Input Pin
Audio Data Output Pin
SDTO pin goes to DVSS when PDN pin is “L” or PMADC bit is “0”.
Digital I/O Power Supply Pin
Digital Ground Pin
Digital Power Supply Pin
Positive Charge Pump Capacitor Terminal Pin
Negative Charge Pump Capacitor Terminal Pin
Power Supply Pin for Headphone Amplifier and Charge Pump Circuit
Ground Pin for Headphone Amplifier and Charge Pump Circuit
Negative Voltage Output Pin for Headphone Amplifier and Charge Pump Circuit
Lch Headphone Amplifier Output Pin
HPL pin goes to AVSS when PMHPL bit is “0”.
Rch Headphone Amplifier Output Pin
HPR pin goes to AVSS when PMHPR bit is “0”.
Rch Analog Output Pin
Lch Analog Output Pin
Mono Analog Input Pin
Rch Analog Input Pin
Lch Analog Input Pin
Rch Analog Input 1 Pin for ADC (LINE Input)
Lch Analog Input 1 Pin for ADC (LINE Input)
MIC Power Supply Pin
MIC Input Pin
Analog Ground Pin
Analog Power Supply Pin
Common Voltage Output Pin, 1.2V (typ, respect to AVSS)
Normally connected to AVSS pin with a 0.1
μ
F ceramic capacitor in parallel with a
2.2
μ
F electrolytic capacitor. VCOM pin goes to AVSS when PMVCM bit = ”0”.
Reference Voltage Output Pin, 2.1V (typ, respect to AVSS)
Reference Voltage Output Pin, 2.1V (typ, respect to AVSS)
Normally connected to AVSS pin with a 0.1
μ
F ceramic capacitor in parallel with a
4.7
μ
F electrolytic capacitor. VREF pin goes to AVSS when PMVCM bit = ”0”.
Power-down Pin
When “L”, the AK4665A is in power-down mode and is held in reset. The AK4665A
should always be reset upon power-up.
Control Data Chip Select Pin
Control Clock Input Pin
Control Data Input Pin
Note 1. Do not allow digital input pins except analog input pins (MICIN, AINL1, AINR1, LIN, RIN and MIN pins) to
float.
2
MCLK
I
3
BICK
I
4
SDTI
I
5
SDTO
O
6
7
8
9
10
11
12
13
TVDD
DVSS
DVDD
CP
CN
HVDD
HVSS
NVSS
-
-
-
O
I
-
-
O
14
HPL
O
15
HPR
O
16
17
18
19
20
21
22
23
24
25
26
ROUT
LOUT
MIN
RIN
LIN
AINR1
AINL1
MPWR
MICIN
AVSS
AVDD
O
O
I
I
I
I
I
O
I
-
-
27
VCOM
O
28
VREF
O
29
PDN
I
30
31
32
CSN
CCLK
CDTI
I
I
I
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