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參數(shù)資料
| 型號(hào)： | AK4665AEN |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 元件分類： | Codec |
| 英文描述： | 20-Bit Stereo CODEC with MIC/HP-AMP |
| 中文描述： | 20位立體聲編解碼器麥克風(fēng)/惠普腺苷 |
| 文件頁數(shù)： | 13/52頁 |
| 文件大?。?/td> | 541K |
| 代理商： | AK4665AEN |
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ASAHI KASEI
[AK4665A]
MS0440-E-01
2006/05
- 13 -
OPERATION OVERVIEW
System Clock
The external clocks required to operate the AK4665A are MCLK (256fs/512fs), LRCK (fs) and BICK. The master clock
(MCLK) should be synchronized with sampling clock (LRCK). The phase between these clocks does not matter. The
sampling frequency is selected by FS3-0 bits (refer to Table 1). The frequency of MCLK is detected automatically, and
the internal master clock becomes the appropriate frequency. Table 2 shows system clock example.
Default
FS3
FS2
FS1
FS0
fs
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
0
0
1
0
0
1
0
0
1
0
1
0
0
1
0
0
1
0
44.1kHz
32kHz
48kHz
22.05kHz
16kHz
24kHz
11.025kHz
8kHz
12kHz
N/A
Others
Table 1. Sampling Frequency
LRCK
fs
8kHz
11.025kHz
12kHz
16kHz
22.05kHz
24kHz
32kHz
44.1kHz
48kHz
MCLK (MHz)
256fs
2.048
2.8224
3.072
4.096
5.6448
6.144
8.192
11.2896
12.288
Table 2. Systems Clock Example
BICK (MHz)
64fs
0.512
0.7056
0.768
1.024
1.4112
1.536
2.048
2.8224
3.072
512fs
4.096
5.6448
6.144
8.192
11.2896
12.288
16.384
22.5792
24.576
External clocks (MCLK, BICK and LRCK) are needed to operate ADC, DAC, ALC2 or HP-Amp. External clocks are
also needed for each path setting of HP-Amp (DACHL, LINHL, MINHL, DACHR, RINHR, MINHR and HPMTN bits)
and Lineout (DACL, LINL, MINL, DACR, RINR and MINR bits) when MOFF8 bit = “0” or MOFF9 bit = “0”. All
external clocks (MCLK, BICK and LRCK) should always be present whenever ADC, DAC, ALC2 or HP-Amp is in
normal operation mode (PMADC bit = “1”, PMDAC bit = “1”, PMLO=ALC2 bits = “1” or PMCP=PMHPL=PMHPR
bits = “1”). If these clocks are not provided, the AK4665A may draw excess current and will not operate properly because
it utilizes these clocks for internal dynamic refresh of registers. If the external clocks are not present, the AK4665A
should be placed in power-down mode (PDN pin = “L” or PMADC=PMDAC=ALC2=PMCP=PMHPL=PMHPR bits =
“0”).
相關(guān)PDF資料 |
PDF描述 |
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| AK4671 | Stereo CODEC with MIC/RCV/HP-AMP |
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| AK4673 | Stereo CODEC with MIC/HP-AMP and Touch Screen Controller |
| AK4673EG | Stereo CODEC with MIC/HP-AMP and Touch Screen Controller |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AK4666VQ | 功能描述:IC CODEC STEREO 20BIT LQFP 制造商:akm semiconductor inc. 系列:* 零件狀態(tài):上次購買時(shí)間 標(biāo)準(zhǔn)包裝:1,000 |
| AK4671 | 制造商:AKM 制造商全稱:AKM 功能描述:Stereo CODEC with MIC/RCV/HP-AMP |
| AK4671_10 | 制造商:AKM 制造商全稱:AKM 功能描述:Stereo CODEC with MIC/RCV/HP-AMP |
| AK4671EG | 制造商:AKM 制造商全稱:AKM 功能描述:Stereo CODEC with MIC/RCV/HP-AMP |
| AK4673 | 制造商:AKM 制造商全稱:AKM 功能描述:Stereo CODEC with MIC/HP-AMP and Touch Screen Controller |
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