
ASAHI KASEI
[AK4588]
MS0287-E-01
2004/03
- 48 -
Biphase Output
The AK4588 can output either the through output(from DIR) or transmitter output(DIT; the data from DAUX2 is
transformed to IEC60958 format.) from TX1/0 pins. Those could be selected by DIT bit. The source of the through
output from TX0 could be selected among RX0-8 by OPS00,01 and 02 bits, for TX1, by OPS10,11 and 12 bits
respectively. When output DAUX2 data, V bit could be controlled by VIN pin and first 5 bytes of C bit could be
controlled by CT39-CT0 bits in control registers. When bit0= “0”(consumer mode), bit20-23 (Audio channel) could not
be controlled directly but be controlled by CT20 bit. When the CT20 bit is “1”, AK4588 outputs “1000” as C20-23 for
left channel and output “0100” at C20-23 for right channel automatically. When CT20 bit is “0”, AK4588 outputs “0000”
set as “1000” for sub frame 1, and “0100” for sub frame 2. U bits are fixed to “0”.as C20-23 for both channel. U bit could
be controlled by UDIT bit as follows; When UDIT bit is “0”, U bit is always “0”. When UDIT bit is “1”, the recovered U
bits are used for DIT (DIR/DIT loop mode of U bit). This mode is only available when PLL is locked and the master
mode.
OPS02
OPS01
OPS00
0
0
0
0
0
1
0
1
1
0
1
0
1
1
1
1
Table 26. Output Data Select for TX0
DIT
OPS12
OPS11
OPS10
0
0
0
0
0
0
0
0
1
0
0
1
0
1
0
0
1
0
0
1
1
0
1
1
1
x
x
Table 27. Output Data Select for TX1
Output Data
RX0
RX1
RX2
RX3
RX4
RX5
RX6
RX7
0
1
0
1
0
1
0
1
Default
Output Data
RX0
RX1
RX2
RX3
RX4
RX5
RX6
RX7
DAUX2
0
1
0
1
0
1
0
1
x
Default
LRCK2
(I
S)
VIN
L0
R0
L1
DAUX2
L0
R0
L1
R191
R1
LRCK2
(except I
2
S)
Figure 22. DAUX2 and VIN input timings