參數(shù)資料
型號： AK4537
廠商： Asahi Kasei Microsystems Co.,Ltd
元件分類： Codec
英文描述： 16-Bit ツヒ Stereo CODEC with MIC/HP/SPK-AMP
中文描述： 16位ツヒ立體聲編解碼器與麥克風/惠普/胰腎聯(lián)合移植腺苷
文件頁數(shù)： 37/76頁
文件大?。?/td> 576K
代理商： AK4537
ASAHI KASEI
[AK4537]
MS0202-E-04
2005/04
- 37 -
ALC2 Operation
(ALC2 bit = “1”)
Input resistance of the ALC2 is 24k
(typ) and centered around VCOM voltage, and the input signal level is –3.1dBV.
(see Figure 33 and Figure 34. 0dBV=1Vrms=2.828Vpp)
The limiter detection level is proportional to HVDD. The output level is limited by the ALC2 circuit when the input signal
exceeds –5.2dBV (=FS-1.9dB@HVDD=3.3V). When a continuous signal of –5.2dBV or greater is input to the ALC2
circuit, the change period of the ALC2 limiter operation is set by the ROTM bit and the attenuation level is 0.5dB/step.
The ALC2 recovery operation uses zero crossings and gains of 1dB/step. The ALC2 recovery operation is done until the
input level of the Speaker-amp goes to –7.2dBV(=FS-3.9dB@HVDD=3.3V). The ROTM bit sets the ALC2 recovery
operation period.
When the input signal is between –5.2dBV and –7.2dBV, the ALC2 limiter or recovery operations are not done.
When the PMSPK bit changes from “0” to “1”, the initilization cycle (2048/fs = 46.4ms @fs=44.1kHz at ROTM bit =
“0”, 512/fs = 11.4ms @fs=44.1kHz at the ROTM bit = “1”) starts. The ALC2 is disabled during the initilization cycle and
the ALC2 starts after completing the initilization cycle.
Parameter
ALC2 Limiter operation
Operation Start Level
5.2dBV
ROTM bit = “0”
2/fs = 45
μ
s@fs=44.1kHz
Period
ROTM bit = “1”
2/fs = 181
μ
s@fs=11.025kHz
Zero-crossing Detection
X
ATT/GAIN
0.5dB step
Table 21. Limiter /Recovery of ALC2 at HVDD=3.3V
ALC2 Recovery operation
7.2dBV
2048/fs = 46.4ms@fs=44.1kHz
512/fs = 46.4ms@fs=11.025kHz
O (Timeout = 2048/fs)
1dB step
-15.3dBV
FS
FS-12dB
0dBV
FS-2.1dB = -5.2dBV
-1.2dBV
Full-differential
-3.3dBV
-10dBV
-5.2dBV
-7.2dBV
-20dBV
-30dBV
-23.3dBV
-8dB
-15.3dBV
-11.3dBV
-3.3dBV
FS-4.1dB = -7.2dBV
+8.1dB
+16.1dB
+4.1dB
-1.9dB
+6.0dB
-8dB
Single-ended
DATT
DAC
ALC2
SPK-AMP
0.8dBV(150mW@8ohm)
+6.0dB
Figure 33. Speaker-amp Output Level Diagram (HVDD=3.3V, DATT=
8.0dB, SPKG bit= “0”, ALC2= “1”)
相關PDF資料
PDF描述
AK4537VN 16-Bit ツヒ Stereo CODEC with MIC/HP/SPK-AMP
AK4538 16Bit DS CODEC with MIC/HP/SPK-AMP
AK4538VN 16Bit DS CODEC with MIC/HP/SPK-AMP
AK4541VQ AC’97 Rev 2.1 Multimedia Audio CODEC
AK4541 AC’97 Rev 2.1 Multimedia Audio CODEC
相關代理商/技術參數(shù)
參數(shù)描述
AK4537VN 制造商:AKM 制造商全稱:AKM 功能描述:16-Bit ΔΣ Stereo CODEC with MIC/HP/SPK-AMP
AK4537VNP-L 制造商:AKM Semiconductor Inc 功能描述:AK4537VNP-L
AK4538 制造商:AKM 制造商全稱:AKM 功能描述:16Bit DS CODEC with MIC/HP/SPK-AMP
AK4538VN 制造商:AKM 制造商全稱:AKM 功能描述:16Bit DS CODEC with MIC/HP/SPK-AMP
AK4541 制造商:AKM 制造商全稱:AKM 功能描述:AC’97 Rev 2.1 Multimedia Audio CODEC
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