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參數(shù)資料
| 型號： | AK4365VN |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 英文描述： | DAC with built-in PLL & HP-AMP |
| 中文描述： | DAC，帶有內(nèi)置的鎖相環(huán) |
| 文件頁數(shù)： | 21/38頁 |
| 文件大?。?/td> | 410K |
| 代理商： | AK4365VN |
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ASAHI KASEI
[AK4365]
MS0110-E-01
2003/10
- 21 -
Addr
85H
Register Name
Power Management
Default
D7
MINR
0
D6
MINL
0
D5
BF
0
D4
D3
D2
HPR
0
D1
HPL
0
D0
DAC
0
MONO
0
MOUT
0
DAC: Power management for DACL, DACR, DACM and PLL. When this bit changes from “0” to “1”, DAC is
powered-up to the current register values (ATT value, sampling rate, etc).
0: Power OFF (Default)
1: Power ON
HPL: Power management for Lch headphone amplifier.
0: Power OFF (Default). Output voltage becomes HPGND (0V).
1: Power ON
HPR: Power management for Rch headphone amplifier
0: Power OFF (Default). Output voltage becomes HPGND (0V).
1: Power ON
MOUT: Power management for monaural lineout
0: Power OFF (Default). Output voltage becomes Hi-z.
1: Power ON
MONO: Control of the signal output from DACL and DACR
0: Normal Output (Default)
1: (L+R)/2
In case of DAC bit = “0”, MONO bit is not ignored.
When changing between Mono and Stereo modes, the headphone amplifiers should be
powered-down. (HPL=HPR= “0”).
When HPL/HPR bits are OFF (“0”), DAC and MOUT bits should also be OFF(“0”). If HPL/HPR bits
are changed to ON (“1”) when DAC and MOUT are powered-up, the HP-AMP will remain off.
HPL bit
HPR bit
MONO bit
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
Table 16. HPL/HPR pin Output Signal
HPL pin
HPGND
HPGND
HPGND
HPGND
Normal output
(L+R)/2
Normal output
(L+R)/2
HPR pin
HPGND
HPGND
Normal output
(L+R)/2
HPGND
HPGND
Normal output
(L+R)/2
Default
BF: BICK Period setting at Master Mode. In slave mode, this bit is ignored.
0: 32fs (Default)
1: 64fs
MINL: The input signal from MIN pin is added to Lch of headphone amplifier.
0: OFF (Default)
1: ON
MINR: The input signal from MIN pin is added to Rch of headphone amplifier.
0: OFF (Default)
1: ON
* When the paths of MINL and MINR are changed, outputs of HP-Amp and MOUT should be muted.
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