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參數(shù)資料
| 型號： | AK4365VN |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 英文描述： | DAC with built-in PLL & HP-AMP |
| 中文描述： | DAC，帶有內(nèi)置的鎖相環(huán) |
| 文件頁數(shù)： | 15/38頁 |
| 文件大小： | 410K |
| 代理商： | AK4365VN |
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ASAHI KASEI
[AK4365]
MS0110-E-01
2003/10
- 15 -
Mode
0
1
2
3
4
5
6
7
FS2
0
0
0
0
1
1
1
1
FS1
0
0
1
1
0
0
1
1
FS0
0
1
0
1
0
1
0
1
fs
MCKI
256fs
512fs
256fs
512fs
256fs
512fs
1024fs
1024fs
48kHz
24kHz
32kHz
16kHz
44.1kHz
22.05kHz
11.025kHz
8kHz
Default
Table 6. Relationship between Sampling Frequency and MCKI Frequency (EXT mode)
PS1
PS0
0
0
0
1
1
0
1
1
Table 7. MCKO frequency (EXT mode, MCKO bit = “1)
Master Mode (SMODE = “L”)
Power Up (DAC bit = “1”)
MCKI pin
Refer to Table 6
MCKO pin MCKO bit = “0”: “L”
MCKO bit = “1”: Output
BICK pin
BF bit = “1”: 64fs output
BF bit = “0”: 32fs output
LRCK pin
Output
MCKO
256fs
128fs
64fs
32fs
Default
Power Down (DAC bit = “0”)
Don’t care
“L”
“L”
“L”
Table 8. Clock Operation at Master mode (EXT mode)
Slave Mode (SMODE = “H”)
Power Up (DAC bit = “1”)
Refer to Table 6
MCKO pin MCKO bit = “0”: “L”
MCKO bit = “1”: Output
BICK pin
Input
LRCK pin
Input
Power Down (DAC bit = “0”)
Don’t care
“L”
MCKI pin
Fixed to “L” or “H” externally
Fixed to “L” or “H” externally
Table 9. Clock Operation at Slave mode (EXT mode)
When low sampling rate, DR and S/N degrade because of the outband noise. DR and S/N are approved
by using higher frequency for MCKI. Table 10 shows DR and S/N in the case DAC output to HP-amp.
DR, S/N (A-weight)
MCKI
fs=8kHz
256fs
63dB
512fs
81dB
1024fs
88dB
Table 10. Relationship between MCKI frequency and DR (and S/N) of HP-amp
fs=16kHz
81dB
88dB
N/A
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