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參數(shù)資料
| 型號： | ADV7312KST |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 顏色信號轉(zhuǎn)換 |
| 英文描述： | Multiformat 11-Bit HDTV Video Encoder |
| 中文描述： | COLOR SIGNAL ENCODER, PQFP64 |
| 封裝： | MS-026BCD, LQFP-64 |
| 文件頁數(shù)： | 4/84頁 |
| 文件大?。?/td> | 975K |
| 代理商： | ADV7312KST |
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REV. 0
–4–
ADV7312–SPECIFICATIONS
R
SET
= 3040 , R
LOAD
= 300 . All specifications T
MIN
to T
MAX
(0 C to 70 C), unless otherwise noted.)
Parameter
STATIC PERFORMANCE
1
Resolution
Integral Nonlinearity
Differential Nonlinearity
2
, +ve
Differential Nonlinearity
2
, –ve
Min
Typ
Max
Unit
Test Conditions
11
1.5
0.5
1.0
Bits
LSB
LSB
LSB
DIGITAL OUTPUTS
Output Low Voltage, V
OL
Output High Voltage, V
OH
Three-State Leakage Current
Three-State Output Capacitance
0.4 [0.4]
3
V
V
μ
A
pF
I
SINK
= 3.2 mA
I
SOURCE
= 400
μ
A
V
IN
= 0.4 V, 2.4 V
2.4[2.0]
3
±
1.0
2
DIGITAL AND CONTROL INPUTS
Input High Voltage, V
IH
Input Low Voltage, V
IL
Input Leakage Current
Input Capacitance, C
IN
ANALOG OUTPUTS
Full-Scale Output Current
Output Current Range
DAC-to-DAC Matching
Output Compliance Range, V
OC
Output Capacitance, C
OUT
VOLTAGE REFERENCE
Internal Reference Range, V
REF
External Reference Range, V
REF
V
REF
Current
4
POWER REQUIREMENTS
Normal Power Mode
I
DD5
2
V
V
μ
A
pF
0.8
3
2
V
IN
= 2.4 V
4.1
4.1
4.33
4.33
1.0
1.0
7
4.6
4.6
mA
mA
%
V
pF
0
1.4
1.15
1.15
1.235
1.235
±
10
1.3
1.3
V
V
μ
A
170
110
95
172
1.0
39
mA
mA
mA
mA
mA
mA
SD Only [16 ]
PS Only [8 ]
HDTV Only [2 ]
SD[16 , 8-bit] + PS[8 , 16-bit]
190
6
I
DD_IO
I
AA7, 8
45
Sleep Mode
I
DD
I
AA
I
DD_IO
POWER SUPPLY REJECTION RATIO
200
10
250
μ
A
μ
A
μ
A
0.01
% / %
NOTES
1
Oversampling disabled. Static DAC performance will be improved with increased oversampling ratios.
2
DNL measures the deviation of the actual DAC output voltage step from the ideal. For +ve DNL, the actual step value lies above the ideal step value; for –ve DNL,
the actual step value lies below the ideal step value.
3
Value in brackets for V
= 2.375 V–2.75 V.
4
External current required to overdrive internal V
.
5
I
, the circuit current, is the continuous current required to drive the digital core.
6
Guaranteed maximum by characterization.
7
I
is the total current required to supply all DACs including the V
REF
circuitry and the PLL circuitry.
8
All DACs on.
Specifications subject to change without notice.
(V
AA
= 2.375 V–2.625 V, V
DD
= 2.375 V–2.625 V; V
DD_IO
= 2.375–3.6 V, V
REF
= 1.235 V,
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