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| 型號： | ADV7184 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Multiformat SDTV Video Decoder with Fast Switch Overlay Support |
| 中文描述： | 標(biāo)清多格式視頻解碼器支持快速開關(guān)重疊 |
| 文件頁數(shù)： | 73/108頁 |
| 文件大?。?/td> | 925K |
| 代理商： | ADV7184 |
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ADV7184
REGISTER ACCESSES
The MPU can write to or read from most of the ADV7184’s
registers, excepting the registers that are read only or write only.
The subaddress register determines which register the next read
or write operation accesses. All communications with the part
through the bus start with an access to the subaddress register.
A read/write operation is then performed from/to the target
address, which then increments to the next address until a stop
command on the bus is performed.
Rev. 0 | Page 73 of 108
REGISTER PROGRAMMING
The I
2
C Register Maps section describes each register in terms
of its configuration. After the part has been accessed over the
bus and a read/write operation is selected, the subaddress is set
up. The subaddress register determines to/from which register
the operation takes place. Table 103and Table 104 list the
various operations under the control of the subaddress register.
As can be seen in Figure 46, the registers in the ADV7184 are
arranged into two maps: the User Map (enabled by default) and
the User Sub Map. The User Sub Map has controls for the
interrupt and VDP functionality on the ADV7184 and the User
Map controls everything else.
The User Map and the User Sub Map consist of a common
space from address 0x00 to 0x3F. Depending on how Bit 5 in
register 0x0E (SUB_USR_EN) is set, the register map then splits
in two sections.
SUB_USR_EN, Address 0x0E [5]
This bit splits the register map at register 0x40.
0 (default)—The register map does not split and the User Map
is enabled.
1—The register map splits and the User Sub Map is enabled.
COMMON I
2
C SPACE
ADDRESS 0x00
≥
0x3F
ADDRESS 0x0E BIT 5 = 0b
ADDRESS 0x0E BIT 5 = 1b
I
2
C SPACE
ADDRESS 0x40
≥
0xFF
I
2
C SPACE
ADDRESS 0x40
≥
0x9C
USER MAP
USER SUB MAP
NORMAL REGISTER SPACE
INTERRUPT AND VDP REGISTER SPACE
0
Figure 46: Register Access —User Map and User Sub Map
I
2
C SEQUENCER
An I
2
C sequencer is used when a parameter exceeds eight bits,
and is therefore distributed over two or more I
2
C registers, for
example, HSB [11:0].
When such a parameter is changed using two or more I
2
C write
operations, the parameter may hold an invalid value for the
time between the first and last I
2
C being completed. In other
words, the top bits of the parameter may already hold the new
value while the remaining bits of the parameter still hold the
previous value.
To avoid this problem, the I
2
C sequencer holds the already
updated bits of the parameter in local memory; all bits of the
parameter are updated together once the last register write
operation has completed.
The correct operation of the I
2
C sequencer relies on the
following:
All I
2
C registers for the parameter in question must be
written to in order of ascending addresses. For example, for
HSB[10:0], write to Address 0x34 first, followed by 0x35.
No other I
2
C taking place between the two (or more) I
2
C
writes for the sequence. For example, for HSB[10:0], write
to Address 0x34 first, immediately followed by 0x35.
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| ADV7184BSTZ | Multiformat SDTV Video Decoder with Fast Switch Overlay Support |
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| ADV7189B | Multiformat SDTV Video Decoder |
| ADV7189BBSTZ268H | Multiformat SDTV Video Decoder |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADV7184BSTZ | 功能描述:IC DECODER VID SDTV MULTI 80LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編碼器，解碼器，轉(zhuǎn)換器 系列:- 產(chǎn)品變化通告:Development Systems Discontinuation 26/Apr/2011 標(biāo)準(zhǔn)包裝:1 系列:- 類型:編碼器 應(yīng)用:DVB-S.2 系統(tǒng) 電壓 - 電源，模擬:- 電壓 - 電源，數(shù)字:- 安裝類型:- 封裝/外殼:模塊 供應(yīng)商設(shè)備封裝:模塊 包裝:散裝 其它名稱:Q4645799 |
| ADV7185 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Professional NTSC/PAL Video Decoder with 10-Bit CCIR656 Output |
| ADV7185KST | 制造商:AD 制造商全稱:Analog Devices 功能描述:Professional NTSC/PAL Video Decoder with 10-Bit CCIR656 Output |
| ADV7186 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Video Decoder and Display Processor |
| ADV7186BBCZ | 功能描述:IC VIDEO DECODER 196CSPBGA RoHS:是 類別:集成電路 (IC) >> 線性 - 視頻處理 系列:- 產(chǎn)品變化通告:Product Discontinuation 07/Mar/2011 標(biāo)準(zhǔn)包裝:3,000 系列:OMNITUNE™ 類型:調(diào)諧器 應(yīng)用:移動電話，手機(jī)，視頻顯示器 安裝類型:表面貼裝 封裝/外殼:65-WFBGA 供應(yīng)商設(shè)備封裝:PG-WFSGA-65 包裝:帶卷 (TR) 其它名稱:SP000365064 |
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