參數(shù)資料
型號： ADV7184
廠商： Analog Devices, Inc.
英文描述： Multiformat SDTV Video Decoder with Fast Switch Overlay Support
中文描述： 標清多格式視頻解碼器支持快速開關(guān)重疊
文件頁數(shù)： 13/108頁
文件大?。?/td> 925K
代理商： ADV7184
ADV7184
ADI Recommended Input Muxing
A maximum of 12 CVBS inputs can be connected and decoded
by the ADV7184. As seen in Figure 5, this means the sources
must be connected to adjacent pins on the IC. This calls for a
careful design of the PCB layout, for example, ground shielding
between all signals routed through tracks that are physically
close together.
Rev. 0 | Page 13 of 108
SDM_SEL[1:0], S-Video and CVBS Autodetect Mode Select,
Address 0x69 [1:0]
The SDM_SEL bits decide on input routing and whether
INSEL[3:0] is used to govern I/P routing decision.
The CVBS/YC autodetection feature is enabled using
SDM_SEL = 11.
Table 8. SDM_SEL[1:0]
SDM_SEL[1:0]
Mode
00
As per INSEL[3:0]
01
CVBS
10
YC
Analogue Video Inputs
As per INSEL[3:0]
AIN11
Y = AIN10
C = AIN12
CVBS = AIN11
Y = AIN11
C = AIN12
11
YC/CVBS auto
Table 9. Input Channel Switching Using INSEL[3:0]
INSEL[3:0] Input Selection, Address 0x00 [3:0]
The INSEL bits allow the user to select an input channel as well
as the input format. Depending on the PCB connections, only a
subset of the INSEL modes is valid. The INSEL[3:0] not only
switches the analog input muxing, it also configures the
standard definition processor core to process CVBS (Comp),
S-Video (Y/C), or component (YPbPr/RGB) format.
ADI-recommended input muxing is designed to minimize
crosstalk between signal channels and to obtain the highest
level of signal integrity. Table 10 summarizes how the PCB
layout should connect analog video signals to the ADV7184.
It is strongly recommended to connect any unused analog input
pins to AGND to act as a shield.
Connect inputs AIN7 to AIN11 to AGND when only six input
channels are used. This improves the quality of the sampling
due to better isolation between the channels.
AIN12 is not under the control of INSEL[3:0]. It can be routed
to ADC0/ADC1/ADC2 only by manual muxing. See Table 11
for details.
Description
Video Format
SCART (CVBS and R, G, B)
INSEL[3:0]
0000
(default)
Analog Input Pins
CVBS1 = AIN1
B = AIN4 or AIN7
1
R = AIN5 or AIN8
1
G = AIN6 or AIN9
1
CVBS2 = AIN2
B = AIN4 or AIN7
1
R = AIN5 or AIN8
1
G = AIN6 or AIN9
1
CVBS3 = AIN3
B = AIN4 or AIN7
1
R = AIN5 or AIN8
1
G = AIN6 or AIN9
1
CVBS4 = AIN4
B = AIN7
R = AIN8
G = AIN9
CVBS1 = AIN5
B = AIN7
R = AIN8
G = AIN9
CVBS1 = AIN6
B = AIN7
R = AIN8
G = AIN9
Y1 = AIN1
C1 = AIN4
Y2 = AIN2
C2 = AIN5
0001
SCART (CVBS and R, G, B)
0010
SCART (CVBS and R, G, B)
0011
SCART (CVBS and R, G, B)
0100
SCART (CVBS and R, G, B)
0101
SCART (CVBS and R, G, B)
0110
YC
0111
YC
Description
Video Format
YC
INSEL[3:0]
1000
Analog Input Pins
Y3 = AIN3
C3 = AIN6
Y1 = AIN1
PB1 = AIN4
PR1 = AIN5
Y2 = AIN2
PB2 = AIN3
PR2 = AIN6
CVBS7 = AIN7
B = AIN4
R = AIN5
G = AIN6
CVBS8 = AIN8
B = AIN4
R = AIN5
G = AIN6
CVBS9 = AIN9
B = AIN4
R = AIN5
G = AIN6
CVBS10 = AIN10
B = AIN4 or AIN7
1
R = AIN5 or AIN8
1
G = AIN6 or AIN9
1
CVBS11 = AIN11
B = AIN4 or AIN7
1
R = AIN5 or AIN8
1
G = AIN6 or AIN9
1
1001
YPrPb
1010
YPrPb
1011
SCART (CVBS and R, G, B)
1100
SCART (CVBS and R, G, B)
1101
SCART (CVBS and R, G, B)
1110
SCART (CVBS and R, G, B)
1111
SCART (CVBS and R, G, B)
1
Selectable via RGB_IP_SEL.
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