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參數(shù)資料
| 型號(hào)： | ADV611JSTZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 6/46頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CCTV DGTL VIDEO CODEC 120LQFP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | 視頻編解碼器 |
| 數(shù)據(jù)接口： | 串行 |
| 分辨率（位）： | 8 b |
| 三角積分調(diào)變： | 無 |
| 電壓 - 電源，數(shù)字： | 4.5 V ~ 5.5 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 120-LQFP |
| 供應(yīng)商設(shè)備封裝： | 120-LQFP（14x14） |
| 包裝： | 托盤 |
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ADV611/ADV612
–14–
REV. 0
HSTART Register
Indirect (Write Only) Register Index 0x02
This register holds the setting for the horizontal start of the ADV611/ADV612’s active video area or quality box. The value in this
register is usually set to zero, but in cases where you wish to crop incoming video it is possible to do so by changing HST.
[9:0]
Horizontal Start, HST[9:0]. 10-bit value defining the start of the active video region. (0 at reset)
[15:10] Reserved (always write zero)
HEND Register
Indirect (Write Only) Register Index 0x03
This register holds the setting for the horizontal end of the ADV611/ADV612’s active video area or quality box. If the value is larger
than the max size of the selected video mode, the ADV611/ADV612 uses the max size of the selected mode for HEND.
[9:0]
Horizontal End, HEN[9:0]. 10-bit value defining the end of the active video region. (0x3FF at reset this value is larger
than the max size of the largest video mode)
[15:10] Reserved (always write zero)
VSTART Register
Indirect (Write Only) Register Index 0x04
This register holds the setting for the vertical start of the ADV611/ADV612’s active video area or quality box. The value in this
register is usually set to zero unless you want to crop the active video.
To vertically crop video while encoding, program the VSTART and VEND registers with actual video line numbers, which differ for
each field. The VSTART and VEND contents must be updated on each field unless the quality box is enabled. Perform this updating as
part of the field-by-field BW register update process. To perform this dynamic update correctly, the update software must keep track of
which field is being processed next.
[9:0]
Vertical Start, VST[9:0]. 10-bit value defining the starting line of the active video region, with line numbers from 1-to-625
in PAL and 1-to-525 in NTSC. (0 at reset)
[15:10] Reserved (always write zero)
VEND Register
Indirect (Write Only) Register Index 0x05
This register holds the setting for the vertical end of the ADV611/ADV612’s active video area or quality box. If the value is larger
than the max size of the selected video mode, the ADV611/ADV612 uses the max size of the selected mode for VEND.
VIDEO AREA REGISTERS
When the quality box is disabled (Mode Control register, Bit 14 = 0), the area defined by the HSTART, HEND, VSTART and
VEND registers is the active area that the wavelet kernel processes. Video data outside the active video area is set to minimum lumi-
nance and zero chrominance (black) by the ADV611/ADV612. These registers allow cropping of the input video during compression
(encode only), but do not change the image size. Figure 12 shows how the video area registers work together.
Some comments on how these registers work are as follows:
The vertical numbers include the blanking areas of the video.
Specifically, a VSTART value of 21 will include the first line
of active video, and the first pixel in a line corresponds to a
value HSTART of 0 (for NTSC regular).
Note that the vertical coordinates start with 1, whereas the
horizontal coordinates start with 0.
The default cropping mode is set for the entire frame. Specifi-
cally, Field 2 starts at a VSTART value of 283 (for NTSC
regular).
When the quality box is enabled (Mode Control register, Bit 14
= 1), the area defined by the HSTART, HEND, VSTART and
VEND registers is the quality box area, and the rest of the video
area is attenuated according to the value in the background
Contrast Control register (Indirect Register Index 0x9). In this
mode, the range of values for VSTART and VEND is 1–243 for
NTSC and 1–288 for PAL. Also note that VSTART and VEND
do not need to be updated for each field in this mode.
VSTART
VEND
HSTART
HEND
ZERO
X, Y
ACTIVE VIDEO AREA
0, 0
ZERO
MAX FOR SELECTED VIDEO MODE
Figure 12. Video Area and Video Area Registers
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADV611JSTZ | 制造商:Analog Devices 功能描述:IC VIDEO CODEC |
| ADV612 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Closed Circuit TV Digital Video Codec |
| ADV612BST | 制造商:Analog Devices 功能描述:Video Compression 120-Pin LQFP 制造商:Rochester Electronics LLC 功能描述:INDUSTRIAL GRADE CCTV DIGITAL VID CODEC - Tape and Reel |
| ADV65056509 | 制造商:LG Corporation 功能描述:Frame Assembly |
| ADV65909302 | 制造商:LG Corporation 功能描述:Frame Assembly |
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