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| 型號： | ADUC836BS |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | MicroConverter, Dual 16-Bit-ADCs with Embedded 62 kB Flash MCU |
| 中文描述： | 8-BIT, FLASH, 12.58 MHz, MICROCONTROLLER, PQFP52 |
| 封裝： | 14 X 14 MM, MO-022-AC-1, MQFP-52 |
| 文件頁數(shù)： | 23/80頁 |
| 文件大小： | 5913K |
| 代理商： | ADUC836BS |
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ADuC836
–23–
PRIMARY AND AUXILIARY ADC CIRCUIT DESCRIPTION
Overview
The ADuC836 incorporates two independent
-
ADCs (primary
and auxiliary) with on-chip digital filtering intended for the mea-
surement of wide dynamic range, low frequency signals such as
those in weigh-scale, strain gage, pressure transducer, or tempera-
ture measurement applications.
Primary ADC
This ADC is intended to convert the primary sensor input. The
input is buffered and can be programmed for one of eight input
ranges from ±20 mV to ±2.56 V being driven from one of three
differential input channel options AIN1/2, AIN3/4, or AIN3/2.
The input channel is internally buffered, allowing the part to
handle significant source impedances on the analog input and
allowing R/C filtering (for noise rejection or RFI reduction) to be
placed on the analog inputs if required. On-chip burnout currents
can also be turned on. These currents can be used to check that
a transducer on the selected channel is still operational before
attempting to take measurements.
The ADC employs a
-
conversion technique to realize up to
16 bits of no missing codes performance. The
-
modulator
converts the sampled input signal into a digital pulse train whose
duty cycle contains the digital information. A Sinc
3
programmable
low-pass filter is then employed to decimate the modulator output
data stream to give a valid data conversion result at programmable
output rates from 5.35 Hz (186.77 ms) to 105.03 Hz (9.52 ms). A
chopping scheme is also employed to minimize ADC offset errors.
A block diagram of the primary ADC is shown in Figure 7.
MODU-
PRODIGITAL
FILTER
-
ADC
BUFFER
AGND
AV
DD
REFIN(–) REFIN(+)
CHOP
AIN1
AIN2
AIN3
AIN4
OUTPUT
OUTPUT
TO ADC0H/M/L
SFRS
PGA
CHOP
OUTPUT AVERAGE
AIMPLEMENTATION, EACH
FROM THE FILTER IS
WITH ITS PREDECESSOR
TOOFFSET ERRORS.
-
ADC
THE
ENTIRE
CHDRIFT ERROR.
REFERENCE
TINPUT TO THE ADuC836 IS
FREFERENCE VOLTAGE IS
SELECTIN ADC0CON.
SHORTED REFERENCE INPUTS.
ANALOG INPUT CHOPPING
ALTTHROUGH THE
CCHOPPING YIELDS
EXAND OFFSET DRIFT
PERFORMANCE.
BURNOUT CURRENTS
IF A TRANSDUCER HAS
BUOPEN-CIRCUIT.
ANALOG MULTIPLEXER
FADDITIONAL INTERNAL SHORT OPTION
CONTROLLED VIA THE CHANNEL
SELECTION BITS IN ADC0CON.
BUFFER AMPLIFIER
THPRESENTS A HIGH
IALLOWING SIGNIFICANT
EXIMPEDANCES.
T A HIGH FREQUENCY 1-BIT
DTO THE DIGITAL FILTER,
ANALOG INPUT VOLTAGE.
-
MODULATOR
DIGITAL FILTER
BY THE MODULATOR. THE UPDATE
FILTER ARE PROGRAMMABLE
VIA THE SF SFR.
TDIGITAL FILTER IS SCALED
BEING PROVIDED AS
THE CONVERSION RESULT.
OUTPUT SCALING
PROGAMPLIFIER
GEIGHT UNIPOLAR AND
2.56V (EXT V
REF
= 2.5V).
MUX
Figure 7. Primary ADC Block Diagram
REV. A
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| ADUC836BS | 制造商:Analog Devices 功能描述:IC SEMICONDUCTOR ((NS)) |
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