參數(shù)資料
型號(hào)： ADT7463ARQZ-REEL
廠商： ON Semiconductor
文件頁(yè)數(shù)： 44/50頁(yè)
文件大?。?/td> 726K
描述： IC REMOTE THERMAL CTRLR 24-QSOP
產(chǎn)品變化通告： MFG CHG Notification ADI to ON Semi
QSOP 24ld Pkg (MSL) Change 17/Jun/2010
標(biāo)準(zhǔn)包裝： 2,500
系列： dBCool®
功能： 風(fēng)扇控制，溫度監(jiān)控器
傳感器類型： 內(nèi)部和外部
感應(yīng)溫度： -40°C ~ 120°C，外部傳感器
精確度： ±1.5°C（最小值）
拓?fù)洌?/td> ADC，比較器，風(fēng)扇速度計(jì)數(shù)器，多路復(fù)用器，寄存器庫(kù)
輸出類型： SMBus?
輸出警報(bào)： 無
輸出風(fēng)扇： 是
電源電壓： 3 V ~ 5.5 V
工作溫度： -40°C ~ 120°C
安裝類型： 表面貼裝
封裝/外殼： 24-SSOP（0.154"，3.90mm 寬）
供應(yīng)商設(shè)備封裝： 24-QSOP
包裝： 帶卷 (TR)
ADT7463
http://onsemi.com
44
Table 66. PWM MIN DUTY CYCLE REGISTERS (Note 1)
Register Address
R/W
Description
PowerOn Default
0x64
R/W
PWM1 Min Duty Cycle
0x80 (50% Duty Cycle)
0x65
R/W
PWM2 Min Duty Cycle
0x80 (50% Duty Cycle)
0x66
R/W
PWM3 Min Duty Cycle
0x80 (50% Duty Cycle)
1.  These registers become readonly when the ADT7463 is in automatic fan control mode.
Table 67. PWM MIN DUTY CYCLE REGISTER BITS
Bit
Name
R/W
Description
<7:0>
PWM Duty Cycle
R/W
These bits define the PWM
MIN
 duty cycle for PWMx.
0x00 = 0% Duty Cycle (Fan Off)
0x40 = 25% Duty Cycle
0x80 = 50% Duty Cycle
0xFF = 100% Duty Cycle (Fan Full Speed)
Table 68. T
MIN
 REGISTERS (Note 1)
Register Address
R/W
Description (Note 2)
PowerOn Default
0x67
R/W
Remote 1 Temperature T
MIN
0x5A (90癈)
0x68
R/W
Local Temperature T
MIN
0x5A (90癈)
0x69
R/W
Remote 2 Temperature T
MIN
0x5A (90癈)
1.  These registers become readonly when the Configuration Register 1 Lock bit is set. Further attempts to write to these registers have no
effect.
2.  These are the T
MIN
 registers for each temperature channel. When the temperature measured exceeds T
MIN
, the appropriate fan runs at
minimum speed and increase with temperature according to T
RANGE
.
Table 69. THERM
 LIMIT REGISTERS (Note 1)
Register Address
R/W
Description (Note 2)
PowerOn Default
0x6A
R/W
Remote 1 THERM
 Limit
0x64 (100癈)
0x6B
R/W
Local THERM
 Limit
0x64 (100癈)
0x6C
R/W
Remote 2 THERM
 Limit
0x64 (100癈)
1.  This register becomes readonly when the Configuration Register 1 Lock bit is set to 1. Further attempts to write to this register have no effect.
2.  If any temperature measured exceeds its THERM
 limit, all PWM outputs drive their fans at 100% duty cycle. This is a failsafe mechanism
incorporated to cool the system in the event of a critical overtemperature. It also ensures some level of cooling in the event that software
or hardware locks up. If set to 0x80, this feature is disabled. The PWM output remains at 100% until the temperature drops below THERM
Limit  Hysteresis. If the THERM
 pin is programmed as an output, exceeding these limits by 0.25癈 can cause the THERM
 pin to assert low
as an output.
Table 70. TEMPERATURE HYSTERESIS REGISTERS (Note 1)
Register Address
R/W
Description (Note 2)
PowerOn Default
0x6D
R/W
Remote 1 Local Temperature Hysteresis
0x44
0x6E
R/W
Remote 2 Temperature Hysteresis
0x40
1.  This register becomes readonly when the Configuration Register 1 Lock bit is set to 1. Further attempts to write to this register have no effect.
2.  Each 4bit value controls the amount of temperature hysteresis applied to a particular temperature channel. Once the temperature for that
channel falls below its T
MIN
 value, the fan remains running at PWM
MIN
 duty cycle until the temperature = T
MIN
  Hysteresis. Up to 15癈 of
hysteresis may be assigned to any temperature channel. The hysteresis value chosen also applies to that temperature channel if its THERM
limit is exceeded. The PWM output being controlled goes to 100% if the THERM
 limit is exceeded and remains at 100% until the temperature
drops below THERM
  Hysteresis. For acoustic reasons, it is recommended that the hysteresis value not be programmed less than 4癈.
Setting the hysteresis value lower than 4癈 causes the fan to switch on and off regularly when the temperature is close to T
MIN.
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