參數(shù)資料
型號: ADT7463ARQZ-REEL
廠商: ON Semiconductor
文件頁數(shù): 24/50頁
文件大?。?/td> 726K
描述: IC REMOTE THERMAL CTRLR 24-QSOP
產(chǎn)品變化通告: MFG CHG Notification ADI to ON Semi
QSOP 24ld Pkg (MSL) Change 17/Jun/2010
標(biāo)準(zhǔn)包裝: 2,500
系列: dBCool®
功能: 風(fēng)扇控制,溫度監(jiān)控器
傳感器類型: 內(nèi)部和外部
感應(yīng)溫度: -40°C ~ 120°C,外部傳感器
精確度: ±1.5°C(最小值)
拓?fù)洌?/td> ADC,比較器,風(fēng)扇速度計(jì)數(shù)器,多路復(fù)用器,寄存器庫
輸出類型: SMBus?
輸出警報(bào):
輸出風(fēng)扇:
電源電壓: 3 V ~ 5.5 V
工作溫度: -40°C ~ 120°C
安裝類型: 表面貼裝
封裝/外殼: 24-SSOP(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 24-QSOP
包裝: 帶卷 (TR)
ADT7463
http://onsemi.com
24
Enabling the SMBALERT
 Interrupt Output
The SMBALERT
  interrupt function is disabled by
default. Pin 10 or Pin 22 can be reconfigured as an
SMBALERT
 output to signal outoflimit conditions.
Table 31. CONFIGURATION PIN 22 AS SMBALERT
OUTPUT (REG. 0X78)
Register
Bit Setting
Config Reg 3
<0> ALERT = 1
Table 32. CONFIGURATION PIN 22 AS SMBALERT
OUTPUT (REG. 0X7D)
Register
Bit Setting
Config Reg 4
<0> AL2.5V = 1
To Assign THERM
 Functionality to a Pin
Pin 14 or Pin 20 can be configured as the THERM
 pin on
the ADT7463.
To enable the THERM
 functionality, users must first set
the THERM
 enable bit. The TH5V bit then determines
which pin the THERM
 functionality is enabled on (i.e., users
cannot enable THERM
 on two pins at once).
To configure Pin 20 as the THERM
 pin:
1. Set the TH5V bit (Bit 1) in the Configuration
Register 4 (Address = 0x7D) = 1.
2. Set the THERM
 Enable Bit (Bit 1) in the
Configuration Register 3 (Address = 0x78) = 1.
To configure Pin 14 as the THERM
 pin:
1. Set the TH5V bit (Bit 1) in the Configuration
Register 4 (Address = 0x7D) = 0.
2. Set the THERM
 Enable Bit (Bit 1) in the
Configuration Register 3 (Address = 0x78) = 1.
THERM
 as an Input
When configured as an input, the user can time assertions
on the THERM
 pin. This can be useful for connecting to the
PROCHOT
 output of a CPU to gauge system performance.
See this data sheet for more information on timing THERM
assertions and generating ALERT
s based on THERM
.
The user can also setup the ADT7463 so when the
THERM pin is driven low externally the fans run at 100%.
The fans run at 100% for the duration of the THERM
 pin
being pulled low.
This is done by setting the BOOST bit (Bit 2) in
Configuration Register 3 (Address = 0x78) to 1. This only
works if the fan is already running, for example, in manual
mode when the current duty cycle is above 0x00 or in
automatic mode when the temperature is above T
MIN
. If the
temperature is below T
MIN
 or if the duty cycle in manual
mode is set to 0x00, then pulling the THERM
 low externally
has no effect. See Figure 36 for more information.
Figure 36. Asserting THERM
 Low as an Input in
Automatic Fan Speed Control Mode
THERM
 ASSERTED LOW AS
AN INPUT. FANS DO NOT GO
TO 100% SINCE TEMPERATURE
IS BELOW T
MIN.
THERM
 ASSERTED LOW AS
AN INPUT. FANS GO TO 100%
SINCE   TEMPERATURE   IS
ABOVE T
MIN
 AND FANS ARE
ALREADY RUNNING.
T
MIN
THERM
THERM
 Timer
The ADT7463 has an internal timer to measure THERM
assertion time. For example, the THERM
 input may be
connected to the PROCHOT
 output of a Pentium
?/DIV>
4 CPU
and measure system performance. The THERM
 input may
also be connected to the output of a trip point temperature
sensor.
The timer is started on the assertion of the ADT7463s
THERM
 input and stopped on the negation of the pin. The
timer counts THERM
 times cumulatively, i.e., the timer
resumes counting on the next THERM
  assertion. The
THERM
 timer continues to accumulate THERM
 assertion
times until the timer is read (it is cleared on read) or until it
reaches full scale. If the counter reaches full scale, it stops
at that reading until cleared.
The 8bit THERM
 timer register (Reg. 0x79) is designed
such that Bit 0 gets set to 1 on the first THERM
 assertion.
Once the cumulative THERM
 assertion time has exceeded
45.52 ms, Bit 1 of the THERM
 timer gets set and Bit 0 now
becomes the LSB of the timer with a resolution of 22.76 ms.
Figure 37 illustrates how the THERM
 timer behaves as
the THERM
 input is asserted and negated. Bit 0 gets set on
the first THERM
 assertion detected. This bit remains set
until such time as the cumulative THERM
 assertions exceed
45.52 ms. At this time, Bit 1 of the THERM
 timer gets set,
and Bit 0 is cleared. Bit 0 now reflects timer readings with
a resolution of 22.76 ms.
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