參數(shù)資料
型號(hào): ADSP-BF535PKBZ-350
廠商: Analog Devices Inc
文件頁(yè)數(shù): 1/44頁(yè)
文件大?。?/td> 0K
描述: IC DSP CONTROLLER 16BIT 260-BGA
產(chǎn)品培訓(xùn)模塊: Blackfin® Processor Core Architecture Overview
Blackfin® Device Drivers
Blackfin® Optimizations for Performance and Power Consumption
Blackfin® System Services
標(biāo)準(zhǔn)包裝: 1
系列: Blackfin®
類(lèi)型: 定點(diǎn)
接口: PCI,SPI,SSP,UART,USB
時(shí)鐘速率: 350MHz
非易失內(nèi)存: 外部
芯片上RAM: 308kB
電壓 - 輸入/輸出: 3.30V
電壓 - 核心: 1.60V
工作溫度: 0°C ~ 70°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 260-BBGA
供應(yīng)商設(shè)備封裝: 260-PBGA(19x19)
包裝: 托盤(pán)
a
Blackfin
Embedded Processor
Information furnished by Analog Devices is believed to be accurate and reliable. How-
ever, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use. No
license is granted by implication or otherwise under any patent or patent rights of Analog
Devices. Trademarks and registered trademarks are the property of their respective
owners.
REV. A
Blackfin and the Blackfin logo are registered trademarks of Analog Devices, Inc.
ADSP-BF535
KEY FEATURES
350 MHz High Performance Blackfin Processor Core
Two 16-Bit MACs, Two 40-Bit ALUs, One 40-Bit Shifter,
Four 8-Bit Video ALUs, and Two 40-Bit Accumulators
RISC-Like Register and Instruction Model for Ease of
Programming and Compiler Friendly Support
Advanced Debug, Trace, and Performance Monitoring
1.0 V–1.6 V Core VDD with Dynamic Power Management
3.3 V I/O
260-Ball PBGA Package
MEMORY
308K Bytes of On-Chip Memory:
16K Bytes of Instruction L1 SRAM/Cache
32K Bytes of Data L1 SRAM/Cache
4K Bytes of Scratch Pad L1 SRAM
256K Bytes of Full Speed, Low Latency L2 SRAM
Memory DMA Controller
Memory Management Unit for Memory Protection
Glueless External Memory Controllers
Synchronous SDRAM Support
Asynchronous with SRAM, Flash, ROM Support
PERIPHERALS
32-Bit, 33 MHz, 3.3 V, PCI 2.2 Compliant Bus Interface
with Master and Slave Support
Integrated USB 1.1 Compliant Device Interface
Two UARTs, One with IrDA
Two SPI Compatible Ports
Two Full-Duplex Synchronous Serial Ports (SPORTs)
Four Timer/Counters, Three with PWM Support
Sixteen Bidirectional Programmable Flag I/O Pins
Watchdog Timer
Real-Time Clock
On-Chip PLL with 1
to 31
Frequency Multiplier
FUNCTIONAL BLOCK DIAGRAM
SYSTEM BUS
INTERFACE UNIT
DMA
CONTROLLER
PCI BUS INTERFACE
256K BYTES L2 SRAM
64
INTERRUPT
CONTROLLER/
TIMER
REAL-TIME CLOCK
UART PORT 1
UART PORT 0
IrDA
TIMER0, TIMER1,
TIMER2
PROGRAMMABLE
FLAGS
USB INTERFACE
SERIAL PORTS (2)
SPI PORTS (2)
EXTERNAL PORT
FLASH SDRAM
CONTROL
BOOT ROM
32
JTAG TEST AND
EMULATION
WATCHDOG TIMER
32
L1
DATA
MEMORY
MMU
L1
INSTRUCTION
MEMORY
B
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 U.S.A.
Tel:781/329-4700
Fax:781/326-8703
2004 Analog Devices, Inc. All rights reserved.
.
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