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參數資料
| 型號： | ADSP-2196MKSTZ-160 |
| 廠商： | Analog Devices Inc |
| 文件頁數： | 51/68頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DSP CONTROLLER 16BIT 144-LQFP |
| 標準包裝： | 1 |
| 系列： | ADSP-21xx |
| 類型： | 定點 |
| 接口： | 主機接口，SPI，SSP，UART |
| 時鐘速率： | 160MHz |
| 非易失內存： | ROM（48 kB） |
| 芯片上RAM： | 40kB |
| 電壓 - 輸入/輸出： | 3.30V |
| 電壓 - 核心： | 2.50V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 144-LQFP |
| 供應商設備封裝： | 144-LQFP（20x20） |
| 包裝： | 托盤 |
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This information applies to a product under development. Its characteristics and specifications are subject to change with-
out notice. Analog Devices assumes no obligation regarding future manufacturing unless otherwise agreed to in writing.
55
REV. PrA
For current information contact Analog Devices at 800/262-5643
ADSP-2196
September 2001
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Example System Hold
Time Calculation
To determine the data output
hold time in a particular
system, first calculate t
DECAY
using the equation given in
Figure 31. Choose –V to be
the difference between the
ADSP-2196’s output voltage
and the input threshold for
the device requiring the hold
time. A typical –V will be
0.4 V. C
L is the total bus
capacitance (per data line),
and I
L is the total leakage or
three-state current (per data
line). The hold time will be
t
DECAY plus the minimum
disable time (i.e., t
DATRWH for
the write cycle).
Capacitive Loading
Output delays and holds are
based on standard capacitive
loads: 50 pF on all pins (see
Figure 37). The delay and
hold specifications given
should be derated by a factor
of 1.5 ns/50 pF for loads
other than the nominal value
of 50 pF. Figure 35 and
Figure 36 show how output
rise time varies with capaci-
tance. These figures also
show graphically how output
delays and holds vary with
load capacitance. (Note that
this graph or derating does
not apply to output disable
delays; see Output Disable
graphs in these figures may
not be linear outside the
ranges shown.
Environmental Conditions
The thermal characteristics
in which the DSP is operating
influence performance.
Thermal Characteristics
The ADSP-2196 comes in a
144-lead LQFP or 144-lead
Ball Grid Array (mini-BGA)
package. The ADSP-2196 is
specified for an ambient tem-
perature (T
AMB) as calculated
using the formula in
Figure 38. To ensure that the
T
AMB data sheet specification
is not exceeded, a heatsink
and/or an air flow source may
be used. A heatsink should be
attached to the ground plane
(as close as possible to the
thermal pathways) with a
thermal adhesive.
Where:
T
AMB = Ambient tempera-
ture (measured near top
surface of package)
PD = Power dissipation in
W (this value depends
upon the specific applica-
tion; a method for
calculating PD is shown
under Power Dissipation).
θ
CA = Value from Table 25.
θ
JB = TBD°C/W
There are some important
things to note about these
T
AMB calculations and the
values in Table 25:
This represents thermal
resistance at total power of
TBD W.
For the LQFP package:
θ
JC
= 0.96°C/W
For the mini-BGA
package:
θ
JC = 8.4°C/W
Figure 33. Equivalent
Device Loading
for AC
Measurements
(Includes All
Fixtures)
9
S)
72
287387
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Figure
34.
Voltage
Reference
Levels
for
AC
Measurements
(Except
Output
Enable/Disable)
,1387
25
287387
9
Figure 35. Typical Output Rise Time (10%–90%,
VDDEXT =Max) vs. Load Capacitance
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