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參數(shù)資料
| 型號： | ADE7878ACPZ-RL |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | Poly Phase Multifunction Energy Metering IC With Total And Fundamental Powers, No Of Pins: 40, Temperature Range: Ind |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, QCC40 |
| 封裝： | 6 X 6 MM, ROHS COMPLIANT, MO-220WJJD, LFCSP-40 |
| 文件頁數(shù)： | 88/96頁 |
| 文件大?。?/td> | 1096K |
| 代理商： | ADE7878ACPZ-RL |
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ADE7854/ADE7858/ADE7868/ADE7878
Rev. E| Page 89 of 96
Bit
Location
Bit Mnemonic
Default Value
Description
8
SUM3SIGN
0
0: if the sum of all phase powers in the CF3 datapath is positive.
1: if the sum of all phase powers in the CF3 datapath is negative. Phase powers in the CF3
datapath are identified by Bits[8:6] (TERMSEL3[x]) of the COMPMODE register and by
Bits[8:6] (CF3SEL[x]) of the CFMODE register.
15:9
Reserved
000 0000
Reserved. These bits are always 0.
Table 48. CONFIG Register (Address 0xE618)
Bit
Location
Bit Mnemonic
Default Value
Description
0
INTEN
0
Integrator enable. When this bit is set to 1, the internal digital integrator is enabled for use in
meters utilizing Rogowski coils on all 3-phase and neutral current inputs.
When this bit is cleared to 0, the internal digital integrator is disabled.
2:1
Reserved
00
Reserved. These bits do not manage any functionality.
3
SWAP
0
When this bit is set to 1, the voltage channel outputs are swapped with the current channel
outputs. Thus, the current channel information is present in the voltage channel registers
and vice versa.
4
MOD1SHORT
0
When this bit is set to 1, the voltage channel ADCs behave as if the voltage inputs were put
to ground.
5
MOD2SHORT
0
When this bit is set to 1, the current channel ADCs behave as if the voltage inputs were put
to ground.
6
HSDCEN
0
When this bit is set to 1, the HSDC serial port is enabled and HSCLK functionality is chosen at
CF3/HSCLK pin.
When this bit is cleared to 0, HSDC is disabled and CF3 functionality is chosen at CF3/HSCLK pin.
7
SWRST
0
When this bit is set to 1, a software reset is initiated.
These bits decide what phase voltage is considered together with Phase A current in the
power path.
00 = Phase A voltage.
01 = Phase B voltage.
10 = Phase C voltage.
9:8
VTOIA[1:0]
00
11 = reserved. When set, the ADE7854/ADE7858/ADE7868/ADE7878 behave like VTOIA[1:0] = 00.
These bits decide what phase voltage is considered together with Phase B current in the
power path.
00 = Phase B voltage.
01 = Phase C voltage.
10 = Phase A voltage.
11:10
VTOIB[1:0]
00
11 = reserved. When set, the ADE7854/ADE7858/ADE7868/ADE7878 behave like VTOIB[1:0] = 00.
These bits decide what phase voltage is considered together with Phase C current in the
power path.
00 = Phase C voltage.
01 = Phase A voltage.
10 = Phase B voltage.
13:12
VTOIC[1:0]
00
11 = reserved. When set, the ADE7854/ADE7858/ADE7868/ADE7878 behave like VTOIC[1:0] = 00.
15:14
Reserved
0
Reserved. These bits do not manage any functionality.
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