參數(shù)資料
型號(hào)： AD9910BSVZ-REEL
廠商： Analog Devices Inc
文件頁數(shù)： 52/64頁
文件大小： 0K
描述： IC DDS 1GSPS 14BIT PAR 100TQFP
產(chǎn)品培訓(xùn)模塊： Direct Digital Synthesis Tutorial Series (1 of 7): Introduction
Direct Digital Synthesizer Tutorial Series (7 of 7): DDS in Action
Direct Digital Synthesis Tutorial Series (3 of 7): Angle to Amplitude Converter
Direct Digital Synthesis Tutorial Series (6 of 7): SINC Envelope Correction
Direct Digital Synthesis Tutorial Series (4 of 7): Digital-to-Analog Converter
Direct Digital Synthesis Tutorial Series (2 of 7): The Accumulator
設(shè)計(jì)資源： Synchronizing Multiple AD9910 1 GSPS Direct Digital Synthesizers (CN0121)
標(biāo)準(zhǔn)包裝： 1,000
分辨率（位）： 14 b
主 fclk： 1GHz
調(diào)節(jié)字寬（位）： 32 b
電源電壓： 1.8V, 3.3V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 100-TQFP 裸露焊盤
供應(yīng)商設(shè)備封裝： 100-TQFP-EP（14x14）
包裝： 帶卷 (TR)
AD9910
Data Sheet
Rev. D | Page 56 of 64
Bit(s)
Mnemonic
Description
12
Clear digital ramp
accumulator
0 = normal operation of the DRG accumulator (default).
1 = asynchronous, static reset of the DRG accumulator. The ramp accumulator remains reset
as long as this bit remains set. This bit is synchronized with either an I/O_UPDATE or a
PROFILE[2:0] change and the next rising edge of SYNC_CLK.
11
Clear phase accumulator
0 = normal operation of the DDS phase accumulator (default).
1 = asynchronous, static reset of the DDS phase accumulator.
10
Load ARR @ I/O update
Ineffective unless CFR1[9:8] = 11b.
0 = normal operation of the OSK amplitude ramp rate timer (default).
1 = OSK amplitude ramp rate timer reloaded anytime I/O_UPDATE is asserted or a
PROFILE[2:0] change occurs.
9
OSK enable
The output shift keying enable bit.
0 = OSK disabled (default).
1 = OSK enabled.
8
Select auto OSK
Ineffective unless CFR1[9] = 1.
0 = manual OSK enabled (default).
1 = automatic OSK enabled.
7
Digital power-down
This bit is effective without the need for an I/O update.
0 = clock signals to the digital core are active (default).
1 = clock signals to the digital core are disabled.
6
DAC power-down
0 = DAC clock signals and bias circuits are active (default).
1 = DAC clock signals and bias circuits are disabled.
5
REFCLK input power-down
This bit is effective without the need for an I/O update.
0 = REFCLK input circuits and PLL are active (default).
1 = REFCLK input circuits and PLL are disabled.
4
Auxiliary DAC power-down
0 = auxiliary DAC clock signals and bias circuits are active (default).
1 = auxiliary DAC clock signals and bias circuits are disabled.
3
External power-down
control
0 = assertion of the EXT_PWR_DWN pin affects full power-down (default).
1 = assertion of the EXT_PWR_DWN pin affects fast recovery power-down.
2
Open
1
SDIO input only
0 = configures the SDIO pin for bidirectional operation; 2-wire serial programming
mode (default).
1 = configures the serial data I/O pin (SDIO) as an input only pin; 3-wire serial
programming mode.
0
LSB first
0 = configures the serial I/O port for MSB-first format (default).
1 = configures the serial I/O port for LSB-first format.
相關(guān)PDF資料
PDF描述
AD9911BCPZ-REEL7 IC DDS 500MSPS DAC 10BIT 56LFCSP
AD9912ABCPZ IC DDS 1GSPS DAC 14BIT 64LFCSP
AD9913BCPZ-REEL7 IC DDS 250MSPS 10BIT ADC 32LFCSP
AD9923ABBCZ IC PROCESSOR CCD 12BIT 105CSPBGA
AD9942BBCZ IC PROCESSOR SGNL 14B 100CSPBGA
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD9911 制造商:AD 制造商全稱:Analog Devices 功能描述:500 MSPS Direct Digital Synthesizer with 10-Bit DAC
AD9911/PCB 制造商:Analog Devices 功能描述:500 MSPS DIRECT DGTL SYNTHESIZER W/ 10-BIT DAC AD9911/PCB - Bulk
AD9911/PCBZ 功能描述:BOARD EVAL FOR AD9911 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評(píng)估演示板和套件 系列:AgileRF™ 標(biāo)準(zhǔn)包裝:1 系列:PCI Express® (PCIe) 主要目的:接口，收發(fā)器，PCI Express 嵌入式:- 已用 IC / 零件:DS80PCI800 主要屬性:- 次要屬性:- 已供物品:板
AD9911BCPZ 功能描述:IC DDS 500MSPS DAC 10BIT 56LFCSP RoHS:是 類別:集成電路 (IC) >> 接口 - 直接數(shù)字合成 (DDS) 系列:- 產(chǎn)品變化通告:Product Discontinuance 27/Oct/2011 標(biāo)準(zhǔn)包裝:2,500 系列:- 分辨率（位）:10 b 主 fclk:25MHz 調(diào)節(jié)字寬（位）:32 b 電源電壓:2.97 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:帶卷 (TR)
AD9911BCPZ-REEL7 功能描述:IC DDS 500MSPS DAC 10BIT 56LFCSP RoHS:是 類別:集成電路 (IC) >> 接口 - 直接數(shù)字合成 (DDS) 系列:- 產(chǎn)品變化通告:Product Discontinuance 27/Oct/2011 標(biāo)準(zhǔn)包裝:2,500 系列:- 分辨率（位）:10 b 主 fclk:25MHz 調(diào)節(jié)字寬（位）:32 b 電源電壓:2.97 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:帶卷 (TR)
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購

我的聯(lián)系方式

*
*
*