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參數(shù)資料
| 型號： | AD9824KCPZRL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 18/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CCD SIGNAL PROC 14BIT 48LFCSP |
| 標準包裝： | 2,500 |
| 類型： | CCD 信號處理器，14 位 |
| 輸入類型： | 邏輯 |
| 輸出類型： | 邏輯 |
| 接口： | 3 線串口 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-VFQFN 裸露焊盤，CSP |
| 供應商設備封裝： | 48-LFCSP-VQ（7x7） |
| 包裝： | 帶卷 (TR) |
REV. 0
–3–
AD9824
Parameter
Min
Typ
Max
Unit
Notes
POWER CONSUMPTION
153
mW
See TPC 1 for Power Curves
MAXIMUM CLOCK RATE
30
MHz
CDS
Gain
0
dB
Allowable CCD Reset Transient
1
500
mV
See Input Waveform in Footnote 1
Max Input Range Before Saturation
1
1.0
V p-p
PxGA Gain at 4 dB
Max CCD Black Pixel Amplitude
1
200
mV
PIXEL GAIN AMPLIFIER (PxGA)
Max Input Range
1.0
V p-p
Max Output Range
1.6
V p-p
Gain Control Resolution
64
Steps
Gain Monotonicity
Guaranteed
Gain Range (Two’s Complement Coding)
See Figure 28 for PxGA Gain Curve
Min Gain (PxGA Gain Code 32)
–2.5
dB
Max Gain (PxGA Gain Code 31)
9.5
dB
VARIABLE GAIN AMPLIFIER (VGA)
Max Input Range
1.6
V p-p
Max Output Range
2.0
V p-p
Gain Control Resolution
1024
Steps
Gain Monotonicity
Guaranteed
Gain Range
See Figure 29 for VGA Gain Curve
Low Gain (VGA Gain Code 77)
2
dB
Max Gain (VGA Gain Code 1023)
36
dB
BLACK LEVEL CLAMP
Clamp Level Resolution
256
Steps
Clamp Level
Measured at ADC Output
Min Clamp Level
0
LSB
Max Clamp Level
1020
LSB
SYSTEM PERFORMANCE
Specications Include Entire Signal Chain
Gain Accuracy
2
Gain = (0.0353
× Code) +3.3
Low Gain (VGA Code 77)
5.5
6
6.5
dB
Max Gain (VGA Code 1023)
38.2
39.4
40.2
dB
Peak Nonlinearity, 500 mV Input Signal
0.1
%
12 dB Gain Applied
Total Output Noise
2.0
LSB rms
AC Grounded Input, 6 dB Gain Applied
Power Supply Rejection (PSR)
40
dB
Measured with Step Change on Supply
POWER-UP RECOVERY TIME
Normal Clock Signals Applied
Reference Standby Mode
1
ms
Total Shutdown Mode
3
ms
Power-Off Condition
15
ms
NOTES
1Input signal characteristics dened as follows:
200mV MAX
OPTICAL BLACK PIXEL
500mV TYP
RESET TRANSIENT
1V MAX
INPUT SIGNAL RANGE
2PxGA gain fixed at Code 63 (3.3 dB).
Specications subject to change without notice.
CCD-MODE SPECIFICATIONS (T
MIN to TMAX, AVDD = DVDD = 3.0 V, fDATACLK = fSHP = fSHD = 30 MHz, unless otherwise noted.)
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