參數(shù)資料
型號： AD9653-125EBZ
廠商： Analog Devices Inc
文件頁數(shù)： 30/40頁
文件大小： 0K
描述： BOARD EVAL FOR AD9653
標(biāo)準(zhǔn)包裝： 1
ADC 的數(shù)量： 4
位數(shù)： 16
采樣率（每秒）： 125M
數(shù)據(jù)接口： LVDS，串行，SPI?
輸入范圍： 2 Vpp
在以下條件下的電源（標(biāo)準(zhǔn)）： 673mW @ 125MSPS
工作溫度： -40°C ~ 85°C
已用 IC / 零件： AD9653
已供物品： 板
AD9653
Data Sheet
Rev. 0 | Page 36 of 40
ADDR
(Hex)
Parameter Name
Bit 7
(MSB)
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
(LSB)
Default
Value
(Hex)
Comments
0x18
VREF
Open
VREF adjustment
digital scheme[2:0]
000 = 1.0 V p-p (1.3 V p-p)
001 = 1.14 V p-p (1.48 V p-p)
010 = 1.33 V p-p (1.73 V p-p)
011 = 1.6 V p-p (2.08 V p-p)
100 = 2.0 V p-p (2.6 V p-p)
0x04
Selects
internal VREF.
Values shown
are for VREF =
1.0 V (1.3 V).
0x19
USER_PATT1_LSB
(global)
B7
B6
B5
B4
B3
B2
B1
B0
0x00
User Defined
Pattern 1 LSB.
0x1A
USER_PATT1_MSB
(global)
B15
B14
B13
B12
B11
B10
B9
B8
0x00
User Defined
Pattern 1 MSB.
0x1B
USER_PATT2_LSB
(global)
B7
B6
B5
B4
B3
B2
B1
B0
0x00
User Defined
Pattern 2 LSB.
0x1C
USER_PATT2_MSB
(global)
B15
B14
B13
B12
B11
B10
B9
B8
0x00
User Defined
Pattern 2 MSB.
0x21
Serial output data
control (global)
LVDS
output
LSB
first
SDR/DDR one-lane/two-lane,
bitwise/bytewise[6:4]
000 = SDR two-lane, bitwise
001 = SDR two-lane, bytewise
010 = DDR two-lane, bitwise
011 = DDR two-lane, bytewise
100 = DDR one-lane, wordwise
Open
Select
2×
frame
Serial output
number of bits
00 = 16 bits
0x30
Serial stream
control.
Default causes
MSB first and
the native bit
stream.
0x22
Serial channel
status (local)
Open
Channel
output
reset
Channel
power-
down
0x00
Used to
power down
individual
sections of a
converter.
0x100
Sample rate
override
Open
Sample
rate
override
enable
0
Open
Sample rate
000 = 20 MSPS
001 = 40 MSPS
010 = 50 MSPS
011 = 65 MSPS
100 = 80 MSPS
101 = 105 MSPS
110 = 125 MSPS
0x00
Sample rate
override
(requires
transfer
register, 0xFF).
0x101
User I/O Control 2
Open
SDIO
pull-
down
0x00
Disables SDIO
pull-down.
0x102
User I/O Control 3
Open
VCM
power-
down
Open
0x00
VCM control.
0x109
Sync
Open
Sync
next
only
Enable
sync
0x00
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