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鍙冩暩(sh霉)璩囨枡
鍨嬭櫉(h脿o)锛� AD7451BRMZ
寤犲晢锛� Analog Devices Inc
鏂囦欢闋�(y猫)鏁�(sh霉)锛� 4/25闋�(y猫)
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC ADC 12BIT DIFF 1MSPS 8MSOP
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 50
浣嶆暩(sh霉)锛� 12
閲囨ǎ鐜囷紙姣忕锛夛細 1M
鏁�(sh霉)鎿�(j霉)鎺ュ彛锛� DSP锛孧ICROWIRE?锛孮SPI?锛屼覆琛�锛孲PI?
杞�(zhu菐n)鎻涘櫒鏁�(sh霉)鐩細 1
鍔熺巼鑰楁暎锛堟渶澶э級锛� 9.25mW
闆诲闆绘簮锛� 鍠浕婧�
宸ヤ綔婧害锛� -40°C ~ 85°C
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
灏佽/澶栨锛� 8-TSSOP锛�8-MSOP锛�0.118"锛�3.00mm 瀵級
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 8-MSOP
鍖呰锛� 绠′欢
杓稿叆鏁�(sh霉)鐩拰椤炲瀷锛� 1 鍊�(g猫)鍋藉樊鍒�锛屽柈妤�
AD7441/AD7451
Rev. D | Page 11 of 24
5
CHAN
G
E
I
N
DNL
(
L
S
B)
鈥�1.0
鈥�0.5
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
0
1
234
4.0
VREF (V)
POSITIVE DNL
NEGATIVE DNL
03
15
3-
01
3
Figure 13. Change in DNL vs. VREF for VDD = 5 V
CHANG
E
IN
I
NL
(
L
S
B)
鈥�2
鈥�1
0
1
2
3
4
0
1
234
5
VREF (V)
5
POSITIVE DNL
NEGATIVE DNL
03
15
3-
01
4
Figure 14. Change in INL vs. VREF for VDD = 5 V
E
F
E
CT
IV
E
NUM
BE
R
O
F
BI
T
S
6
7
8
9
10
11
012345
12
VREF (V)
VDD = 3V
VDD = 5V
03
15
3-
01
5
Figure 15. ENOB vs. VREF for VDD = 5 V and 3 V
S
N
R
(
d
B)
0
100
200
300
400
500
0
鈥�20
鈥�40
鈥�60
鈥�80
鈥�100
鈥�120
鈥�140
VREF (V)
8192 POINT FFT
fSAMPLE = 1MSPS
fIN = 100kSPS
SINAD = 61.7dB
THD = 鈥�81.7dB
SFDR = 鈥�82dB
03
15
3-
01
6
Figure 16. AD7441 Dynamic Performance
DNL
E
RRO
R
(
L
S
B)
0
256
512
768
1024
0.5
鈥�0.5
鈥�0.4
鈥�0.3
鈥�0.2
鈥�0.1
0
0.1
0.2
0.3
0.4
CODE
0
31
53
-01
7
Figure 17. Typical DNL for the AD7441
INL
E
RRO
R
(
L
S
B
)
0
256
512
768
1024
0.5
鈥�0.5
鈥�0.4
鈥�0.3
鈥�0.2
鈥�0.1
0
0.1
0.2
0.3
0.4
CODE
0
31
53
-01
8
Figure 18. Typical INL for the AD7441
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