參數(shù)資料
型號(hào)： AD5757ACPZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 36/44頁(yè)
文件大?。?/td> 0K
描述： IC DAC 16BIT QUAD 64-LFCSP
特色產(chǎn)品： AD5755 / AD5755-1 / AD5757 DACs
標(biāo)準(zhǔn)包裝： 1
設(shè)置時(shí)間： 15µs
位數(shù)： 16
數(shù)據(jù)接口： DSP，MICROWIRE?，QSPI?，串行，SPI?
轉(zhuǎn)換器數(shù)目： 4
電壓電源： 模擬和數(shù)字
工作溫度： -40°C ~ 105°C
安裝類型： 表面貼裝
封裝/外殼： 64-VFQFN 裸露焊盤，CSP
供應(yīng)商設(shè)備封裝： 64-LFCSP-VQ（9x9）
包裝： 管件
輸出數(shù)目和類型： *
采樣率（每秒）： *
Data Sheet
AD5757
Rev. D | Page 41 of 44
TRANSIENT VOLTAGE PROTECTION
The AD5757 contains ESD protection diodes that prevent dam-
age from normal handling. The industrial control environment
can, however, subject I/O circuits to much higher transients. To
protect the AD5757 from excessively high voltage transients,
external power diodes and a surge current limiting resistor (RP)
are required, as shown in Figure 63. A typical value for RP is 10 .
The two protection diodes and the resistor (RP) must have appro-
priate power ratings.
RLOAD
R
D1
D2
P
AD5757
VBOOST_x
IOUT_x
AGND
CDCDC
4.7F
CFILTER
0.1F
RFILTER
10
(FROM
DC-TO-DC
CONVERTER)
09225-
013
Figure 63. Output Transient Voltage Protection
Additional protection can be provided using transient voltage
suppressors (TVSs), also referred to as transorbs. These compo-
nents are available as unidirectional suppressors, which protect
against positive high voltage transients, and as bidirectional
suppressors, which protect against both positive and negative
high voltage transients. Transient voltage suppressors are avail-
able in a wide range of standoff and breakdown voltage ratings.
The TVS should be sized with the lowest breakdown voltage
possible while not conducting in the functional range of the
current output.
It is recommended that all field connected nodes be protected.
MICROPROCESSOR INTERFACING
Microprocessor interfacing to the AD5757 is via a serial bus that
uses a protocol compatible with microcontrollers and DSP
processors. The communications channel is a 3-wire minimum
interface consisting of a clock signal, a data signal, and a latch
signal. The AD5757 requires a 24-bit data-word with data valid
on the falling edge of SCLK.
The DAC output update is initiated on either the rising edge of
LDAC or, if LDAC is held low, on the rising edge of SYNC. The
contents of the registers can be read using the readback function.
AD5757-TO-ADSP-BF527 INTERFACE
The AD5757 can be connected directly to the SPORT interface
of the ADSP-BF527, an Analog Devices, Inc., Blackfin DSP.
Figure 64 shows how the SPORT interface can be connected to
control the AD5757.
AD5757
SYNC
SCLK
SDIN
LDAC
SPORT_TFS
SPORT_TSCK
SPORT_DTO
GPIO0
ADSP-BF527
09225-
080
Figure 64. AD5757-to-ADSP-BF527 SPORT Interface
LAYOUT GUIDELINES
Grounding
In any circuit where accuracy is important, careful consideration
of the power supply and ground return layout helps to ensure
the rated performance. The printed circuit board on which the
AD5757 is mounted should be designed so that the analog and
digital sections are separated and confined to certain areas of the
board. If the AD5757 is in a system where multiple devices
require an AGND-to-DGND connection, the connection should
be made at one point only. The star ground point should be
established as close as possible to the device.
The GNDSWx and ground connection for the AVCC supply are
referred to as PGND. PGND should be confined to certain areas
of the board, and the PGND-to-AGND connection should be
made at one point only.
Supply Decoupling
The AD5757 should have ample supply bypassing of 10 F
in parallel with 0.1 F on each supply located as close to the
package as possible, ideally right up against the device. The
10 F capacitors are the tantalum bead type. The 0.1 F capaci-
tor should have low effective series resistance (ESR) and low
effective series inductance (ESL), such as the common ceramic
types, which provide a low impedance path to ground at high
frequencies to handle transient currents due to internal logic
switching.
Traces
The power supply lines of the AD5757 should use as large a
trace as possible to provide low impedance paths and reduce the
effects of glitches on the power supply line. Fast switching signals
such as clocks should be shielded with digital ground to prevent
radiating noise to other parts of the board and should never be
run near the reference inputs. A ground line routed between the
SDIN and SCLK lines helps reduce crosstalk between them (not
required on a multilayer board that has a separate ground plane,
but separating the lines helps). It is essential to minimize noise
on the REFIN line because it couples through to the DAC output.
Avoid crossover of digital and analog signals. Traces on
opposite sides of the board should run at right angles to each
other. This reduces the effects of feedthrough on the board. A
microstrip technique is by far the best but not always possible
with a double-sided board. In this technique, the component
side of the board is dedicated to ground plane, whereas signal
traces are placed on the solder side.
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