- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄165342 > AD5757ACPZ-REEL7 (ANALOG DEVICES INC) SERIAL INPUT LOADING, 15 us SETTLING TIME, 16-BIT DAC, QCC64 PDF資料下載
參數(shù)資料
| 型號： | AD5757ACPZ-REEL7 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | DAC |
| 英文描述： | SERIAL INPUT LOADING, 15 us SETTLING TIME, 16-BIT DAC, QCC64 |
| 封裝： | 9 X 9 MM, ROHS COMPLIANT, MO-220VMMD-4, LFCSP-64 |
| 文件頁數(shù)： | 22/44頁 |
| 文件大小： | 1122K |
| 代理商： | AD5757ACPZ-REEL7 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁當前第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁
AD5757
Rev. A | Page 29 of 44
DAC Control Register
The DAC control register is used to configure each DAC channel. The DAC control register options are shown in Table 19 and Table 20.
Table 19. Programming DAC Control Register
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
0
1
0
INT_ENABLE
CLR_EN
OUTEN
RSET
DC_DC
R2
R1
R0
1 X = don’t care.
Table 20. DAC Control Register Functions
Bit
Description
INT_ENABLE
Powers up the dc-to-dc converter, DAC, and internal amplifiers for the selected channel. Does not enable the output. Can
only be done on a per channel basis. It is recommended to set this bit and allow a >200 μs delay before enabling the
output because this results in a reduced output enable glitch. Plots of this glitch can be found in Figure 25.
CLR_EN
Per channel clear enable bit. Selects if this channel clears when the CLEAR pin is activated.
CLR_EN = 1, channel clears when the part is cleared.
CLR_EN = 0, channel does not clear when the part is cleared (default).
OUTEN
Enables/disables the selected output channel.
OUTEN = 1, enables the channel.
OUTEN = 0, disables the channel (default).
RSET
Selects an internal or external current sense resistor for the selected DAC channel.
RSET = 0, selects the external resistor (default).
RSET = 1, selects the internal resistor.
DC_DC
Powers the dc-to-dc converter on the selected channel.
DC_DC = 1, power up the dc-to-dc converter.
DC_DC = 0, power down the dc-to-dc converter (default).
This allows per channel dc-to-dc converter power-up/power-down. To power down the dc-to-dc converter, the OUTEN and
INT_ENABLE bits must also be set to 0.
All dc-to-dc converters can also be powered up simultaneously using the DCDC_ALL bit in the main control register.
R2, R1, R0
Selects the output range to be enabled.
R2
R1
R0
Output Range Selected
1
0
4 mA to 20 mA current range
1
0
1
0 mA to 20 mA current range
1
0
0 mA to 24 mA current range
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD5757ACPZ | SERIAL INPUT LOADING, 15 us SETTLING TIME, 16-BIT DAC, QCC64 |
| AD590-02 | ANALOG TEMP SENSOR-CURRENT, 298.2uA, RECTANGULAR, THROUGH HOLE MOUNT |
| AD632TH/883 | ANALOG MULTIPLIER OR DIVIDER, MBCY10 |
| AD670JNZ | 2-CH 8-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDIP20 |
| AD706JRZ | Dual Picoampere Input Current Bipolar Op Amp |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD5757X | 制造商:AD 制造商全稱:Analog Devices 功能描述:Quad Channel, 16-Bit, Serial Input, 4-20mA Output DAC, Dynamic Power Control, HART Connectivity |
| AD575JD | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog-to-Digital Converter， 10-Bit |
| AD575JN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog-to-Digital Converter， 10-Bit |
| AD575KD | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog-to-Digital Converter， 10-Bit |
| AD575KN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog-to-Digital Converter， 10-Bit |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。