參數(shù)資料
| 型號： | ACS8947T |
| 廠商： | Semtech |
| 文件頁數(shù)： | 20/30頁 |
| 文件大小： | 0K |
| 描述： | IC JITTER ATT MULT PLL 48-QFN |
| 標準包裝： | 1 |
| 類型： | 時鐘/頻率發(fā)生器，多路復用器 |
| PLL： | 是 |
| 主要目的： | 3G，以太網，PCI，SONET/SDH，無線系統(tǒng) |
| 輸入： | LVPECL |
| 輸出： | CML，LVPECL |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 2:4 |
| 差分 - 輸入:輸出： | 是/是 |
| 頻率 - 最大： | 625MHz |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-VFQFN 裸露焊盤 |
| 供應商設備封裝： | 48-QFN（7x7） |
| 包裝： | 托盤 |
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ACS8947T JAM PLL
ADVANCED COMMS & SENSING
FINAL
DATASHEET
Revision 1.00/September 2007 Semtech Corp.
Page 27
www.semtech.com
Thermal Conditions
The device is rated for full temperature range when this
package is used with a 4-layer or more PCB. Copper
coverage must exceed 50%. All pins must be soldered to
the PCB. Maximum operating temperature must be
reduced when the device is used with a PCB with less than
these requirements.
As the device includes a large thermal die paddle ground
connection which must be soldered to the PCB in addition
to the pins, giving improved pull-off strength and thermal
dissipation characteristics as well as the necessary
grounding.
Although not essential for the ACS8947T, one technique
that may be used to improve heat dissipation from
through the large centre pad is to include a thermal
landing the same size as the centre pad on the
component side of the board (and one on the opposite
side of the PCB) connected to analog ground using a
number of thermal vias, approximately 0.33 mm
diameter. These vias should be completely connected
(flooded over) to the thermal landing(s) as well as to
internal ground planes if using a multi-layer PCB. 3 x 3
vias pitched at 1.27 mm between via centres would be
more than sufficient for the ACS8947T if this method
were adopted.
Figure 21 Typical 48 Pin QFN PCB Footprint
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