
PIC18F1230/1330
DS39758D-page 60
2009 Microchip Technology Inc.
6.3.4
SPECIAL FUNCTION REGISTERS
The Special Function Registers (SFRs) are registers
used by the CPU and peripheral modules for controlling
the desired operation of the device. These registers are
implemented as static RAM. SFRs start at the top of
data memory (FFFh) and extend downward to occupy
the top half of Bank 15 (F80h to FFFh). A list of these
The SFRs can be classified into two sets: those
associated with the “core” device functionality (ALU,
Resets and interrupts) and those related to the
peripheral functions. The Reset and Interrupt registers
are described in their respective chapters, while the
ALU’s STATUS register is described later in this section.
Registers related to the operation of a peripheral feature
are described in the chapter for that peripheral.
The SFRs are typically distributed among the
peripherals whose functions they control. Unused SFR
locations are unimplemented and read as ‘0’s.
TABLE 6-1:
SPECIAL FUNCTION REGISTER MAP FOR PIC18F1230/1330 DEVICES
Address
Name
Address
Name
Address
Name
Address
Name
FFFh
TOSU
FDFh
INDF2(1)
FBFh
—(2)
F9Fh
IPR1
FFEh
TOSH
FDEh POSTINC2(1)
FBEh
—(2)
F9Eh
PIR1
FFDh
TOSL
FDDh POSTDEC2(1)
FBDh
—(2)
F9Dh
PIE1
FFCh
STKPTR
FDCh
PREINC2(1)
FBCh
—(2)
F9Ch
—(2)
FFBh
PCLATU
FDBh
PLUSW2(1)
FBBh
—(2)
F9Bh
OSCTUNE
FFAh
PCLATH
FDAh
FSR2H
FBAh
—(2)
F9Ah
PTCON0
FF9h
PCL
FD9h
FSR2L
FB9h
—(2)
F99h
PTCON1
FF8h
TBLPTRU
FD8h
STATUS
FB8h
BAUDCON
F98h
PTMRL
FF7h
TBLPTRH
FD7h
TMR0H
FB7h
—(2)
F97h
PTMRH
FF6h
TBLPTRL
FD6h
TMR0L
FB6h
—(2)
F96h
PTPERL
FF5h
TABLAT
FD5h
T0CON
FB5h
CVRCON
F95h
PTPERH
FF4h
PRODH
FD4h
—(2)
FB4h
CMCON
F94h
—(2)
FF3h
PRODL
FD3h
OSCCON
FB3h
—(2)
F93h
TRISB
FF2h
INTCON
FD2h
LVDCON
FB2h
—(2)
F92h
TRISA
FF1h
INTCON2
FD1h
WDTCON
FB1h
—(2)
F91h
PDC0L
FF0h
INTCON3
FD0h
RCON
FB0h
SPBRGH
F90h
PDC0H
FEFh
INDF0(1)
FCFh
TMR1H
FAFh
SPBRG
F8Fh
PDC1L
FEEh POSTINC0(1)
FCEh
TMR1L
FAEh
RCREG
F8Eh
PDC1H
FEDh POSTDEC0(1)
FCDh
T1CON
FADh
TXREG
F8Dh
PDC2L
FECh
PREINC0(1)
FCCh
—(2)
FACh
TXSTA
F8Ch
PDC2H
FEBh
PLUSW0(1)
FCBh
—(2)
FABh
RCSTA
F8Bh FLTCONFIG
FEAh
FSR0H
FCAh
—(2)
FAAh
—(2)
F8Ah
LATB
FE9h
FSR0L
FC9h
—(2)
FA9h
EEADR
F89h
LATA
FE8h
WREG
FC8h
—(2)
FA8h
EEDATA
F88h
SEVTCMPL
FE7h
INDF1(1)
FC7h
—(2)
FA7h
EECON2(1)
F87h
SEVTCMPH
FE6h POSTINC1(1)
FC6h
—(2)
FA6h
EECON1
F86h
PWMCON0
FE5h POSTDEC1(1)
FC5h
—(2)
FA5h
IPR3
F85h
PWMCON1
FE4h
PREINC1(1)
FC4h
ADRESH
FA4h
PIR3
F84h
DTCON
FE3h
PLUSW1(1)
FC3h
ADRESL
FA3h
PIE3
F83h
OVDCOND
FE2h
FSR1H
FC2h
ADCON0
FA2h
IPR2
F82h
OVDCONS
FE1h
FSR1L
FC1h
ADCON1
FA1h
PIR2
F81h
PORTB
FE0h
BSR
FC0h
ADCON2
FA0h
PIE2
F80h
PORTA
Note 1:
This is not a physical register.
2:
Unimplemented registers are read as ‘0’.