
PIC18F1230/1330
DS39758D-page 42
2009 Microchip Technology Inc.
5.4
Brown-out Reset (BOR)
PIC18F1230/1330 devices implement a BOR circuit that
provides the user with a number of configuration and
power-saving options. The BOR is controlled by the
BORV1:BORV0 and BOREN1:BOREN0 Configuration
bits. There are a total of four BOR configurations which
The BOR threshold is set by the BORV1:BORV0 bits.
If BOR is enabled (any values of BOREN1:BOREN0
except ‘00’), any drop of VDD below VBOR (parameter
D005) for greater than TBOR (parameter 35) will reset the device. A Reset may or may not occur if VDD falls
below VBOR for less than TBOR. The chip will remain in
Brown-out Reset until VDD rises above VBOR.
If the Power-up Timer is enabled, it will be invoked after
VDD rises above VBOR; it then will keep the chip in
Reset
for
an
additional
time
delay,
TPWRT
(parameter 33). If VDD drops below VBOR while the Power-up Timer is running, the chip will go back into a
Brown-out Reset and the Power-up Timer will be
initialized. Once VDD rises above VBOR, the Power-up
Timer will execute the additional time delay.
BOR
and
the
Power-on
Timer
(PWRT)
are
independently configured. Enabling Brown-out Reset
does not automatically enable the PWRT.
5.4.1
SOFTWARE ENABLED BOR
When BOREN1:BOREN0 = 01, the BOR can be
enabled or disabled by the user in software. This is
done with the control bit, SBOREN (RCON<6>).
Setting SBOREN enables the BOR to function as
previously described. Clearing SBOREN disables the
BOR entirely. The SBOREN bit operates only in this
mode; otherwise it is read as ‘0’.
Placing the BOR under software control gives the user
the additional flexibility of tailoring the application to its
environment without having to reprogram the device to
change BOR configuration. It also allows the user to
tailor device power consumption in software by
eliminating the incremental current that the BOR
consumes. While the BOR current is typically very
small, it may have some impact in low-power
applications.
5.4.2
DETECTING BOR
When Brown-out Reset is enabled, the BOR bit always
resets to ‘0’ on any Brown-out Reset or Power-on
Reset event. This makes it difficult to determine if a
Brown-out Reset event has occurred just by reading
the state of BOR alone. A more reliable method is to
simultaneously check the state of both POR and BOR.
This assumes that the POR bit is reset to ‘1’ in software
immediately after any Power-on Reset event. If BOR is
‘0’ while POR is ‘1’, it can be reliably assumed that a
Brown-out Reset event has occurred.
5.4.3
DISABLING BOR IN SLEEP MODE
When BOREN1:BOREN0 = 10, the BOR remains
under hardware control and operates as previously
described. Whenever the device enters Sleep mode,
however, the BOR is automatically disabled. When the
device returns to any other operating mode, BOR is
automatically re-enabled.
This mode allows for applications to recover from
brown-out situations, while actively executing code,
when the device requires BOR protection the most. At
the same time, it saves additional power in Sleep mode
by eliminating the small incremental BOR current.
TABLE 5-1:
BOR CONFIGURATIONS
Note:
Even when BOR is under software control,
the Brown-out Reset voltage level is still
set by the BORV1:BORV0 Configuration
bits. It cannot be changed in software.
BOR Configuration
Status of
SBOREN
(RCON<6>)
BOR Operation
BOREN1
BOREN0
00
Unavailable BOR disabled; must be enabled by reprogramming the Configuration bits.
01
Available
BOR enabled in software; operation controlled by SBOREN.
10
Unavailable BOR enabled in hardware in Run and Idle modes, disabled during
Sleep mode.
11
Unavailable BOR enabled in hardware; must be disabled by reprogramming the
Configuration bits.