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參數(shù)資料
| 型號： | 952801CFLFT |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | 293.34 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封裝： | MO-118, GREEN, SSOP-48 |
| 文件頁數(shù)： | 4/24頁 |
| 文件大?。?/td> | 219K |
| 代理商： | 952801CFLFT |
12
Integrated
Circuit
Systems, Inc.
ICS952801
Advance Information
0719—01/22/03
I
2
C Table: VCO Frequency Control Register
Control
Function
Bit 7
N Div8
N Divider Bit 8
RW
-
X
Bit 6
M Div6
RW
-
X
Bit 5
M Div5
RW
-
X
Bit 4
M Div4
RW
-
X
Bit 3
M Div3
RW
-
X
Bit 2
M Div2
RW
-
X
Bit 1
M Div1
RW
-
X
Bit 0
M Div0
RW
-
X
I
2
C Table: VCO Frequency Control Register
Control
Function
Bit 7
N Div7
RW
-
X
Bit 6
N Div6
RW
-
X
Bit 5
N Div5
RW
-
X
Bit 4
N Div4
RW
-
X
Bit 3
N Div3
RW
-
X
Bit 2
N Div2
RW
-
X
Bit 1
N Div1
RW
-
X
Bit 0
N Div0
RW
-
X
I
2C Table: Spread Spectrum Control Register
Control
Function
Bit 7
SSP7
RW
-
X
Bit 6
SSP6
RW
-
X
Bit 5
SSP5
RW
-
X
Bit 4
SSP4
RW
-
X
Bit 3
SSP3
RW
-
X
Bit 2
SSP2
RW
-
X
Bit 1
SSP1
RW
-
X
Bit 0
SSP0
RW
-
X
I
2
C Table: Spread Spectrum Control Register
Control
Function
Bit 7
Reserved
R
-
0
Bit 6
Reserved
R
-
0
Bit 5
SSP13
RW
-
X
Bit 4
SSP12
RW
-
X
Bit 3
SSP11
RW
-
X
Bit 2
SSP10
RW
-
X
Bit 1
SSP9
RW
-
X
Bit 0
SSP8
RW
-
X
1
01
0
1
PWD
01
Type
Byte 11
Pin #
Name
The decimal
representation of M Div
(6:0) + 2 is equal to
reference divider value.
Default at power up =
latch-in or Byte 0 Rom
table.
-
Byte 12
Pin #
Name
-
Type
-
The decimal
representation of N Div
(8:0) + 8 is equal to
VCO divider value.
Default at power up =
latch-in or Byte 0 Rom
table.
-
Byte 13
Pin #
Name
Type
-
These Spread
Spectrum bits will
program the spread
pecentage. It is
recommended to use
ICS Spread % table for
spread programming.
-
PWD
-
Byte 14
Pin #
Name
Type
-
It is recommended to
use ICS Spread %
table for spread
programming.
-
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