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參數(shù)資料
| 型號： | 952801CFLFT |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | 293.34 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封裝： | MO-118, GREEN, SSOP-48 |
| 文件頁數(shù)： | 13/24頁 |
| 文件大?。?/td> | 219K |
| 代理商： | 952801CFLFT |
20
Integrated
Circuit
Systems, Inc.
ICS952801
Advance Information
0719—01/22/03
Electrical Characteristics - CPUCLK
TA = 0 - 70 C; VDD = 3.3 V +/-5%; CL = 20 pF (unless otherwise stated)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Output Impedance
ZO
VO = VX
15
55
W
Output High Voltage
VOH2B
11.2
V
Output Low Voltage
VOL2B
0.4
V
Output Low Current
IOL2B
VOL = 0.3 V
18
mA
Rise Edge Rate
1
Measured from 20-80%
2
7
V/ns
Fall Edge Rate
1
Measured from 80-20%
2
7
V/ns
VDIFF
Differential Voltage,
Measured @ the Hammer
test load (single-ended
measurement)
0.4
2.3
V
DVDIFF
Change in VDIFF_DC
magnitude, Measured @
the Hammer test load
(single-ended
measurement)
-150
150
mV
VCM
Common Mode Voltage,
Measured @ the Hammer
test load (single-ended
measurement)
1.05
1.45
V
DVCM
Change in Common Mode
Voltage, Measured @ the
Hammer test load (single-
ended measurement)
-200
200
mV
Duty Cycle
1
dt2B
VT = 50%
45
53
%
Jitter, Cycle-to-cycle
1
tjcyc-cyc2B
VT = VX
0
200
ps
Notes:
1 - Guaranteed by design, not 100% tested in production.
3 - Vpullup(external) = 1.5V, Min = Vpullup(external)/2-150mV; Max=(Vpullup(external)/2)+150mV
2 - VDIF specifies the minimum input differential voltages (VTR-VCP) required for switching, where VTR is the "true"
input level and VCP is the "complement" input level.
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