參數資料
型號: 951462YGLFT
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時鐘產生/分配
英文描述: PROC SPECIFIC CLOCK GENERATOR, PDSO64
封裝: 6.10 MM, 0.50 MM PITCH, ROHS COMPLIANT, MO-153, TSSOP-64
文件頁數: 8/23頁
文件大小: 241K
代理商: 951462YGLFT
16
Integrated
Circuit
Systems, Inc.
ICS951462
1094J—03/16/09
Electrical Characteristics - K8 Push Pull Differential Pair
TA = 0 - 70°C; VDD = 3.3 V +/-5%; CL =AMD64 Processor Test Load
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
NOTES
Rising Edge Rate
δV/δt
2
10
V/ns
1
Falling Edge Rate
δV/δt
2
10
V/ns
1
Differential Voltage
VDIFF
0.4
1.25
2.3
V
1
Change in VDIFF_DC Magnitude
VDIFF
-150
150
mV
1
Common Mode Voltage
VCM
1.05
1.25
1.45
V
1
Change in Common Mode
Voltage
VCM
-200
200
mV
1
Jitter, Cycle to cycle
tjcyc-cyc
Measurement from differential
wavefrom. Maximum difference of
cycle time between 2 adjacent
cycles.
050
85
ps
1
Jitter, Accumulated
tja
Measured using the JIT2 software
package with a Tek 7404 scope.
TIE (Time Interval Error)
measurement technique:
Sample resolution = 50 ps,
Sample Duration = 10 s
-1000
1000
1,2,3
Duty Cycle
dt3
Measurement from differential
wavefrom
45
53
%
1
Output Impedance
RON
Average value during switching
transition. Used for determining
series termination value.
15
35
55
1
Group Skew
tsrc-skew
Measurement from differential
wavefrom
50
ps
1
1Guaranteed by design and characterization, not 100% tested in production.
2 All accumulated jitter specifications are guaranteed assuming that REF is at 14.31818MHz
3 Spread Spectrum is off
Measured at the AMD64
processor's test load. 0 V +/- 400
mV (differential measurement)
Measured at the AMD64
processor's test load. (single-
ended measurement)
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