參數(shù)資料
型號(hào)： 935266671518
廠商： NXP SEMICONDUCTORS
元件分類： 微控制器/微處理器
英文描述： 1 CHANNEL(S), 400M bps, SERIAL COMM CONTROLLER, PQFP144
封裝： 20 X 20 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-486-1, LQFP-144
文件頁(yè)數(shù)： 37/83頁(yè)
文件大小： 316K
代理商： 935266671518
Philips Semiconductors
Preliminary specification
PDI1394L41
1394 content protection AV link layer controller
2000 Dec 01
39
12.6.2.10
Block receive
The block receive format is shown below. The first quadlet contains the destination node ID and the rest of the packet header. The second and
third quadlets contain 16-bit sourceID and either the 48-bit destination offset (for requests) or the response code and reserved data (for
responses). The fourth quadlet contains the length of the data field and the extended transaction code (all zeros except for lock transactions).
The block data, if any, follows the extended code. The last quadlet contains packet reception status.
dataLength
extendedTcode
Block data
padding (if needed)
destinationID
tLabel
rt
tCode
priority
29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
destinationOffsetHigh
destinationOffsetLow
sourceID
SV00262
spd
ackSent
31 30
Figure 28.
Block Write or Lock Request Receive Format
destinationID
tLabel
rt
tCode
priority
29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
rCode
sourceID
dataLength
extendedTcode
Block data
padding (if needed)
SV00263
spd
ackSent
31 30
u
Figure 29.
Block Read or Lock Response Receive Format
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