參數(shù)資料
型號(hào)： 935262056518
廠(chǎng)商： NXP SEMICONDUCTORS
元件分類(lèi)： 尋呼電路
英文描述： TELECOM, PAGING DECODER, PQFP32
封裝： 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, SOT-358-1, LQFP-32
文件頁(yè)數(shù)： 31/76頁(yè)
文件大?。?/td> 301K
代理商： 935262056518
1999 Apr 12
37
Philips Semiconductors
Product specication
FLEX
roaming decoder II
PCD5013
8.6.5
PHASE AND FRAME CALCULATION
The method for specifying phase and base frame of a
pager is specified in the CAPCODE type.
The phase and base frame are extracted by standard
rules from the user address field in the CAPCODE
(CAPCODE types A to L)
The phase is indicated by the CAPCODE type
(Table 32) and the base frame is specified in the frame
field of the CAPCODE (CAPCODE types U to Z).
For easy allocation of (up to 4) consecutive CAPCODEs
having the same phase and frame, an offset in the
range 0 to 3 is subtracted from the user address for the
purposes of phase and frame extraction. The offset is
determined by the CAPCODE type.
The standard rules for extracting phase and base frame
from the user address are (phase numbers 0 to 3
correspond to phases A to D):
Phase number = ((Address
Offset) DIV 4) MOD 4
Frame = ((Address
Offset) DIV 16) MOD 128
where DIV is the integer division and MOD is the
remainder of an integer division.
For a CAPCODE not using the standard rules for
extracting phase and base frame (types U to Z) the 3-digit
frame field 000 to 127 and a single digit decimal pager
collapse 0 to 5 can precede the CAPCODE type. When
these fields are not included, the paging device or the
subscriber database must be accessed to determine the
assigned frame and collapse value.
The CAPCODE for a roaming pager uses an Alpha
character to describe the level of roaming capability.
The Alpha characters descriptions are shown in Table 33.
Table 32 Frame and phase extraction for different CAPCODE types
Note
1. All-phase decoding is not defined in FLEX
G1.8 and, therefore, is not supported by the PCD5013.
CAPCODE TYPE
PAGER TYPE
FRAME/PHASE EXTRACTION
A
single-phase
standard rules; Offset: 0
B
single-phase
standard rules; Offset: 1
C
single-phase
standard rules; Offset: 2
D
single-phase
standard rules; Offset: 3
E
any-phase
standard rules; Offset: 0
F
any-phase
standard rules; Offset: 1
G
any-phase
standard rules; Offset: 2
H
any-phase
standard rules; Offset: 3
I
all-phase; note 1
standard rules; Offset: 0
J
all-phase; note 1
standard rules; Offset: 1
K
all-phase; note 1
standard rules; Offset: 2
L
all-phase; note 1
standard rules; Offset: 3
U
single-phase
no frame extraction rules, phase-A
V
single-phase
no frame extraction rules, phase-B
W
single-phase
no frame extraction rules, phase-C
X
single-phase
no frame extraction rules, phase-D
Y
any-phase
no frame extraction rules, any-phase
Z
all-phase; note 1
no frame extraction rules, all-phase
相關(guān)PDF資料
PDF描述
935262079112 ALVT SERIES, 7-BIT DRIVER, TRUE OUTPUT, PDSO56
935262218112 0 TIMER(S), REAL TIME CLOCK, PDIP8
07683 MINI MOD SHIELD
07683-2 MINI MOD SHIELD
935262233112 16 I/O, PIA-GENERAL PURPOSE, PDSO24
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
935262217118 制造商:NXP Semiconductors 功能描述:Real Time Clock Serial 8-Pin SO T/R
935264217557 制造商:NXP Semiconductors 功能描述:SUB ONLY IC
935267356112 制造商:NXP Semiconductors 功能描述:IC TEA1507PN
935268081112 制造商:NXP Semiconductors 功能描述:SUB ONLY IC
935268721125 制造商:NXP Semiconductors 功能描述:Buffer/Line Driver 1-CH Non-Inverting 3-ST CMOS 5-Pin TSSOP T/R
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠(chǎng)商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*