參數(shù)資料
型號(hào): 935262056518
廠商: NXP SEMICONDUCTORS
元件分類: 尋呼電路
英文描述: TELECOM, PAGING DECODER, PQFP32
封裝: 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, SOT-358-1, LQFP-32
文件頁數(shù): 21/76頁
文件大小: 301K
代理商: 935262056518
1999 Apr 12
28
Philips Semiconductors
Product specication
FLEX
roaming decoder II
PCD5013
8.5
Receiver control interface
8.5.1
GENERAL
The PCD5013 has 8 programmable receiver control lines,
S0 to S7. The host can program via SPI packets what
setting is applied to the receiver control lines, the duration
of warm-up and shut-down stages and the polling of the
LOBAT pin. This programmability allows the PCD5013 to
interface with many off-the-shelf receiver ICs. Note that
these packets are ignored when sent while decoding is
enabled (ON bit is set in the control packet).
8.5.2
LOW BATTERY DETECTION
The PCD5013 can be configured to poll the LOBAT pin at
the end of every receiver control setting. This check can be
enabled or disabled for each receiver control setting. If the
poll is enabled for a setting, the pin is read just before the
PCD5013 activates the next setting on the receiver control
lines. The PCD5013 sends a status packet whenever the
value differs from the previous time that the LOBAT pin
was polled.
8.5.3
RECEIVER SETTINGS AT RESET
The receiver control ports are 3-state outputs which are set
to high impedance when the PCD5013 is reset, until the
corresponding FRS bit in the receiver line control packet is
set or the PCD5013 is turned on for the first time after a
reset (by setting the ON bit in the control packet).
This allows the designer to force the receiver control lines
to the receiver off setting with external pull-up or pull-down
resistors before the host can configure these settings in
the PCD5013.
8.5.4
RECEIVER OFF STATE (ID = 10H)
The receiver off state is configured by the receiver off
setting packet (Table 20), which defines the settings to be
applied when the PCD5013 decides to switch the
receiver off.
LBC: low battery check (Table 20). If this bit is set, the
PCD5013 checks the status of the LOBAT port just before
leaving the receiver off state. Value after reset = 0.
CLS: control line setting (Table 20). This is the value to be
output on the receiver control lines for the receiver off
state. Value after reset = 0.
ST: step time (Table 20). This sets the duration of the
warm-up off time. The setting is in steps of 625
s. Valid
values are 625
s (ST = 01H) to 159.375 ms (ST = FFH).
Value after reset = 01H.
Table 20 Receiver off setting packet bit assignments
BYTE
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
300010000
20000
LBC
000
1
CLS7
CLS6
CLS5
CLS4
CLS3
CLS2
CLS1
CLS0
0ST7
ST6
ST5
ST4
ST3
ST2
ST1
ST0
相關(guān)PDF資料
PDF描述
935262079112 ALVT SERIES, 7-BIT DRIVER, TRUE OUTPUT, PDSO56
935262218112 0 TIMER(S), REAL TIME CLOCK, PDIP8
07683 MINI MOD SHIELD
07683-2 MINI MOD SHIELD
935262233112 16 I/O, PIA-GENERAL PURPOSE, PDSO24
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
935262217118 制造商:NXP Semiconductors 功能描述:Real Time Clock Serial 8-Pin SO T/R
935264217557 制造商:NXP Semiconductors 功能描述:SUB ONLY IC
935267356112 制造商:NXP Semiconductors 功能描述:IC TEA1507PN
935268081112 制造商:NXP Semiconductors 功能描述:SUB ONLY IC
935268721125 制造商:NXP Semiconductors 功能描述:Buffer/Line Driver 1-CH Non-Inverting 3-ST CMOS 5-Pin TSSOP T/R