參數(shù)資料
型號(hào)： 9202
廠商： 意法半導(dǎo)體
英文描述： Flash Programmable System Devices with 8032 Microcontroller Core
中文描述： 閃存可編程系統(tǒng)設(shè)備與8032微控制器內(nèi)核
文件頁數(shù)： 47/175頁
文件大?。?/td> 1731K
代理商： 9202
47/175
UPSD3254A, UPSD3254BV, UPSD3253B, UPSD3253BV
I/O PORTS (MCU MODULE)
The MCU Module has five ports: Port 0, Port 1,
Port 2, Port 3, and Port 4. (Refer to the PSD Mod-
ule section on I/O ports A,B,C and D). Ports P0
and P2 are dedicated for the external address and
data bus and is not available in the 52-pin package
devices.
Port 1 - Port 3 are the same as in the standard
8032 micro-controllers, with the exception of the
additional special peripheral functions. All ports
are bi-directional. Pins of which the alternative
function is not used may be used as normal bi-di-
rectional I/O.
The use of Port 1 -Port 4 pins as alternative func-
tions are carried out automatically by the
uPSD325X devices provided the associated SFR
Bit is set HIGH.
The following SFR registers (Tables 29, 30, and
31) are used to control the mapping of alternate
functions onto the I/O port bits. Port 1 alternate
functions are controlled using the P1SFS register,
except for Timer 2 and the 2nd UART which are
enabled by their configuration registers. P1.0 to
P1.3 are default to GPIO after reset.
Port 3 pins 6 and 7 have been modified from the
standard 8032. These pins that were used for
READ and WRITE control signals are now GPIO
or I
2
C bus pins. The READ and WRITE pins are
assigned to dedicated pins.
Port 3 (I
2
C) and Port 4 alternate functions are con-
trolled using the P3SFS and P4SFS Special Func-
tion Selection registers. After a reset, the I/O pins
default to GPIO. The alternate function is enabled
if the corresponding bit in the PXSFS register is
set to '1.' Other Port 3 alternative functions (UART,
Interrupt, and Timer/Counter) are enabled by their
configuration register and do not require setting of
the bits in P3SFS.
Table 28. I/O Port Functions
Table 29. P1SFS (91H)
Table 30. P3SFS (93H)
Table 31. P4SFS (94H)
Port Name
Main Function
Alternate
Port 1
GPIO
Timer 2 - Bits 0,1
2nd UART - Bits 2,3
ADC - Bits 4..7
Port 3
GPIO
UART - Bits 0,1
Interrupt - Bits 2,3
Timers - Bits 4,5
I
2
C - Bits 6,7
Port 4
GPIO
DDC - Bits 0..2
PWM - Bits 3..7
USB +/-
USB +/- Only
7
6
5
4
3
2
1
0
0=Port 1.7
1=ACH3
0=Port 1.6
1=ACH2
0=Port 1.5
1=ACH1
0=Port 1.4
1=ACH0
Bits Reserved
Bits Reserved
7
6
5
4
3
2
1
0
0 = Port 3.7
1 = SCL
from I
2
C unit
0 = Port 3.6
1 = SDA
from I
2
C unit
Bits are reserved.
7
6
5
4
3
2
1
0
0=Port 4.7
1=PWM 4
0=Port 4.6
1=PWM 3
0=Port 4.5
1=PWM 2
0=Port 4.4
1=PWM 1
0=Port 4.3
1=PWM 0
0=Port 4.2
1=V
SYNC
0=Port 4.1
1=DDC -
SCL
0=Port 4.0
1=DDC -
SDA
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