參數(shù)資料
型號： 9202
廠商： 意法半導(dǎo)體
英文描述： Flash Programmable System Devices with 8032 Microcontroller Core
中文描述： 閃存可編程系統(tǒng)設(shè)備與8032微控制器內(nèi)核
文件頁數(shù)： 119/175頁
文件大小： 1731K
代理商： 9202
119/175
UPSD3254A, UPSD3254BV, UPSD3253B, UPSD3253BV
PLDS
The PLDs bring programmable logic functionality
to the uPSD. After specifying the logic for the
PLDs in PSDsoft Express, the logic is pro-
grammed into the device and available upon Pow-
er-up.
Table 89. DPLD and CPLD Inputs
Note: 1. These inputs are not available in the 52-pin package.
The PSD MODULE contains two PLDs: the De-
code PLD (DPLD), and the Complex PLD (CPLD).
The PLDs are briefly discussed in the next few
paragraphs, and in more detail in the section enti-
tled “Decode PLD (DPLD),” page 121, and the
section entitled “Complex PLD (CPLD),” page 122.
Figure 58 shows the configuration of the PLDs.
The DPLD performs address decoding for Select
signals for PSD MODULE components, such as
memory, registers, and I/O ports.
The CPLD can be used for logic functions, such as
loadable counters and shift registers, state ma-
chines, and encoding and decoding logic. These
logic functions can be constructed using the Out-
put Macrocells (OMC), Input Macrocells (IMC),
and the AND Array. The CPLD can also be used
to generate External Chip Select (ECS1-ECS2)
signals.
The AND Array is used to form product terms.
These product terms are specified using PSDsoft.
The PLD input signals consist of internal MCU sig-
nals and external inputs from the I/O ports. The in-
put signals are shown in Table 89.
The Turbo Bit in PSD MODULE
The PLDs can minimize power consumption by
switching off when inputs remain unchanged for
an extended time of about 70ns. Resetting the
Turbo Bit to '0' (Bit 3 of PMMR0) automatically
places the PLDs into standby if no inputs are
changing. Turning the Turbo Mode off increases
propagation delays while reducing power con-
sumption. See the section entitled “POWER MAN-
AGEMENT,” page 135, on how to set the Turbo
Bit.
Additionally, five bits are available in PMMR2 to
block MCU control signals from entering the PLDs.
This reduces power consumption and can be used
only when these MCU control signals are not used
in PLD logic equations.
Each of the two PLDs has unique characteristics
suited for its applications. They are described in
the following sections.
Input Source
Input Name
Number
of
Signals
MCU Address Bus
A15-A0
16
MCU Control Signals
PSEN, RD, WR,
ALE
4
RESET
RST
1
Power-down
PDN
1
Port A Input
Macrocells
(1)
PA7-PA0
8
Port B Input
Macrocells
PB7-PB0
8
Port C Input
Macrocells
PC2-4, PC7
4
Port D Inputs
PD2-PD1
2
Page Register
PGR7-PGR0
8
Macrocell AB
Feedback
MCELLAB.FB7-
FB0
8
Macrocell BC
Feedback
MCELLBC.FB7-
FB0
8
Flash memory
Program Status Bit
Ready/Busy
1
相關(guān)PDF資料
PDF描述
92100 ION VECTOR SYSTEM
92108K IC
53113 IC
53114 Dual/Triple Ultra-Low-Voltage SOT23 µP Supervisory Circuits
53115 IC
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
9202 05 00 制造商:Coto Technology 功能描述:Surface mount reed relay 1 pole single
9202 R/B 功能描述:PLUG BANANA STD SET/2 RED/BLK RoHS:是 類別:連接器，互連式 >> 香蕉式和端頭 - 插座，插頭 系列:- 標(biāo)準(zhǔn)包裝:100 系列:PBD 類型:尖頭插孔 類型:母頭 插頭/配接插頭直徑:標(biāo)準(zhǔn) 安裝類型:通孔，水平 端子:焊接 絕緣體:完全絕緣 特點(diǎn):- 顏色:紅 包裝:散裝 觸點(diǎn)表面涂層:金 觸點(diǎn)材料:- 主體材料:- 線規(guī):- 工作溫度:-25°C ~ 100°C
92020 功能描述:- Power Management Evaluation Board 制造商:vishay dale 系列:- 零件狀態(tài):有效 主要用途:電源管理 嵌入式:- 使用的 IC/零件:- 主要屬性:- 輔助屬性:- 所含物品:板 標(biāo)準(zhǔn)包裝:1
9202000000 功能描述:CASE CARRY LITE 550 制造商:weidmuller 系列:* 零件狀態(tài):在售 標(biāo)準(zhǔn)包裝:1
920-200P-51S 制造商:Amphenol Corporation 功能描述:CONNECTOR - Bulk
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*