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CHAPTER 9 A/D CONVERTER
9.6 Operation in Timer Trigger Mode
The A/D converter is the coincidence interrupt signal of the TM11 compare register, and can set conversion timings
to a maximum of four channel analog inputs (ANI0 to ANI3).
TM11 and four capture/compare registers (CC110 to CC113) are used for the timer for specifying the analog
conversion trigger.
The following two modes are provided according to the specification of the TUM11 register.
(1) One-shot mode
To use the one-shot mode, 1 should be set to the OST bit of the TUM11 register (one-shot mode).
When the A/D conversion period is longer than the TM11 period, the TM11 generates an overflow, holds 0000H
and stops. Thereafter, TM11 does not output the coincidence interrupt signal (A/D conversion trigger) of the
compare register, and the A/D converter sets into the A/D conversion standby state. The TM11 count operation
restarts when the valid edge of the TCLR11 pin input is detected or when 1 is written to the CE11 bit of the
TMC11 register.
(2) Loop mode
To use the loop mode, 0 should be set to the OST bit (normal mode) of the TUM11 register.
When the TM11 generates an overflow, the TM11 starts counting from 0000H again, and the coincidence
interrupt signal (A/D conversion trigger) of the compare register is repeatedly output and A/D conversion is
also repeated.
9.6.1 Select mode operations
A/D converts an analog input (ANI0 to ANI3) specified by the ADM0 register. The conversion results are stored
in the ADCRn register corresponding to the analog input. For the select mode, the 1-buffer mode and 4-buffer mode
are provided according to the storing method of the A/D conversion results (n = 0 to 7).
(1) 1-buffer mode operations (Timer trigger select: 1-buffer)
A/D converts one analog input once and stores the conversion results in one ADCRn register.
There are two one-buffer modes, the 1-trigger mode and 4-trigger mode, according to the number of triggers.
(a) 1-trigger mode (Timer trigger select: 1-buffer, 1-trigger)
A/D converts one analog input once using the trigger of the coincidence interrupt signal (INTCC110) and
stores the results in one ADCRn register.
Generates an INTAD interrupt for each A/D conversion and ends the A/D conversion.
When the TM11 is set to the one-shot mode, A/D conversion is ended in one conversion. To restart the
A/D conversion, input the valid edge to the TCLR11 pin or write 1 to the CE11 bit of the TMC11 register.
When set to the loop mode, unless the CE bit of the ADM0 register is set to 0, A/D conversion is repeated
each time the coincidence interrupt is generated.