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CHAPTER 7 TIMER/COUNTER FUNCTION (REAL-TIME PULSE UNIT)
Bit Position
Bit Name
Function
9, 8
CES1n1, CES1n0
TCLR1n Edge Select
Specifies valid edge of external clear input (TCLR1n)
CES1n1 CES1n0
Valid edge
0
0
Falling edge
0
1
Rising edge
1
0
RFU (reserved)
1
1
Both rising and falling edge
7 to 4
CMS1nm
(m = 0 to 3)
Capture/Compare Mode Select
Selects operation mode of capture/compare registers (CC1nm)
0: Capture register. However, capture operation is performed only when CE1 of
TMC1n registers = “1”.
1: Compare register
3 to 0
IMS1nm
(m = 0 to 3)
Interrupt Mode Select
Selects INTP1nm or INTCC1nm as interrupt source
0: Uses coincidence signals of INTCC1nm of compare registers as interrupt signal
1: Uses external input signals INTP1nm as interrupt signal
Remark
n = 1 to 4
Precautions in Use of A/D Converter
(1) When the A/D converter is set to the timer trigger mode
The coincidence interrupt of the compare register becomes the A/D conversion start trigger and conversion
operations are started. At this time, the coincidence interrupt of the compare register also function as the
coincidence interrupt of the compare register for the CPU. To prevent generation of the coincidence interrupt
of the compare register for the CPU, disable interrupt using the interrupt mask bit (P11MK0 to P11MK3) of
the interrupt control register (P11IC0 to P11IC3).
(2) When the A/D converter is set to the external trigger mode
The external trigger input becomes the A/D conversion start trigger and conversion operations are started.
At this time, the external trigger input also functions as a capture trigger and external interrupt of timer 1. To
prevent generation of capture trigger and external interrupt, set timer 1 to the compare register and disable
the interrupt with the interrupt mask bit of the interrupt control register.
The operations performed when timer 1 is set to the compare register and interrupt is not disabled by the
interrupt control register are as follows.
(a) When the interrupt mask bit (IMS113) of the TUM11 register is 0
Also functions as the coincidence interrupt of the compare register for the CPU.
(b) When the interrupt mask bit (IMS113) of the TUM11 register is 1
The external trigger input of the A/D converter also functions as the external interrupt for the CPU.