Z8 Microcontrollers
ZiLOG
Instruction Descriptions and Formats
UM001600-Z8X0599
12-37
JP
JUMP
JP
JUMP
JP cc, dst
Instruction Format:
Operation:
If cc (condition code) is true, then PC <— dst
A conditional jump transfers Program Control to the destination address if the condition specified by cc
(condition code) is true. Otherwise, the instruction following the JP instruction is executed. See Section
12.3 for a list of condition codes.
The unconditional jump simply replaces the contents of the Program Counter with the contents of the
register pair specified by the destination operand. Program Control then passes to the instruction
addressed by the PC.
Note:
Address mode IRR can be used to specify a 4-bit Working Register. In this format, the destination
Working Register operand is specified by adding 1110B (EH) to the high nibble of the operand. For
example, if Working Register R12 (CH) is the destination operand, then ECH will be used as the
destination operand in the Op Code.
Example:
If the Carry Flag is set, the statement:
JP C, 1520H
Op Code: 7D 15 20
replaces the contents of the Program Counter with 1520H and transfers program control to that location.
If the Carry Flag had not been set, control would have fallen through to the statement following the JP
instruction.
Example:
If Working Register Pair RR2 contains the value 3F45H, the statement:
JP @RR2
Op Code: 30 E2
replaces the contents of the PC with the value 3F45H and transfers program control to that location.
dst
OPC
OPC
dst
Cycles
12 if jump taken
10 if not taken
8
OPC
(Hex)
Address Mode
dst
ccD
DA
30
IRR
cc = 0 to F
cc
Flags:
C:
Z:
S:
V:
D:
H:
Unaffected
Unaffected
Unaffected
Unaffected
Unaffected
Unaffected
E
dst