
XRT86VL38
16
REV. V1.2.0
OCTAL T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
TABLE 5: GENERAL PURPOSE INPUT/OUTPUT 1 CONTROL REGISTER(GPIOCR1)
HEX ADDRESS: 0X4102
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
7-4
GPIO1_3DIR
GPIO1_2DIR
GPIO1_1DIR
GPIO1_0DIR
R/W
0000
GPIO1_3/GPIO1_2/GPIO1_1/GPIO1_0 Direction
These bits permit the user to define the General Purpose I/O Pins,
GPIO1_3/GPIO1_2/GPIO1_1/GPIO1_0 as either Input pins or Output
pins, as described below.
0 – Configures GPIO1_3/GPIO1_2/GPIO1_1/GPIO1_0 to function as
input pins.
1 – Configures GPIO1_3/GPIO1_2/GPIO1_1/GPIO1_0 to function as
output pins.
1. If GPIO1_3/GPIO1_2/GPIO1_1/GPIO1_0 are configured to
function as input pins, then the user can monitor the state of
these input pins by reading out the state of Bit 3-0 (GPIO1_3/
GPIO1_2/GPIO1_1/GPIO1_0) within this register.
2. If GPIO1_3/GPIO1_2/GPIO1_1/GPIO1_0 are configured to
function as output pins, then the user can control the state of
these output pins by writing the appropriate value into Bit 3-0
(GPIO1_3/GPIO1_2/GPIO1_1/GPIO1_0) within this register.
3-0
GPIO1_3
GPIO1_2
GPIO1_1
GPIO1_0
R/W
0000
GPIO1_3/GPIO1_2/GPIO1_1/GPIO1_0 Control
The exact function of this bit depends upon whether General Purpose I/
O Pins, GPIO1_3/GPIO1_2/GPIO1_1/GPIO1_0 have been configured
to function as input or output pins, as described below.
If GPIO1_3/GPIO1_2/GPIO1_1/GPIO1_0 are configured to function
as input pins:
If GPIO1_3/GPIO1_2/GPIO1_1/GPIO1_0 are configured to function as
input pins, then the user can monitor the state of the corresponding
input pin by reading out the state of these bits.
NOTE:
If GPIO1_3/GPIO1_2/GPIO1_1/GPIO1_0 are configured to
function as input pins, then writing to this particular register will
have no effect on the state of this pin.
If GPIO1_3/GPIO1_2/GPIO1_1/GPIO1_0 are configured to function
as output pins:
If GPIO1_3/GPIO1_2/GPIO1_1/GPIO1_0 are configured to function as
output pins, then the user can control the state of the corresponding
output pin by writing the appropriate value to these bits.
NOTE:
GPIO1_3/GPIO1_2/GPIO1_1/GPIO1_0 can be configured to
function as input or output pins, by writing the appropriate
value to Bit 7-4 (GPIO1_3DIR/GPIO1_2DIR/GPIO1_1DIR/
GPIO1_0DIR) within this register.