TABLE
參數(shù)資料
型號: XRT86VL38IB484-F
廠商: Exar Corporation
文件頁數(shù): 23/160頁
文件大?。?/td> 0K
描述: IC LIU/FRAMER T1/E1/J1 8CH 484BG
標(biāo)準(zhǔn)包裝: 60
控制器類型: T1/E1/J1 調(diào)幀器,LIU
電源電壓: 3.3V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 484-BGA
供應(yīng)商設(shè)備封裝: 484-STBGA(23x23)
包裝: 托盤
XRT86VL38
114
REV. V1.2.0
OCTAL T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
TABLE 94: SS7 STATUS REGISTER FOR LAPD1 (SS7SR1)
HEX ADDRESS: 0XnB10
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
0
SS7_1_STATUS
RUR/
WC
0
SS7 Interrupt Status for LAPD Controller 1
This Reset-Upon-Read bit field indicates whether or not the “SS7”
interrupt has occurred since the last read of this register.
If this interrupt is enabled, then the Receive T1 Framer block will
generate an interrupt when the Received LAPD message is more
than 276 Bytes in length.
0 = Indicates that the “SS7” interrupt has not occurred since the last
read of this register
1 = Indicates that the “SS7” interrupt has occurred since the last
read of this register
TABLE 95: SS7 ENABLE REGISTER FOR LAPD1 (SS7ER1)
HEX ADDRESS: 0XnB11
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
0
SS7_1_ENB
R/W
0
SS7 Interrupt Enable for LAPD Controller 1
This bit enables or disables the “SS7” interrupt within the LAPD
Controller 1.
If this interrupt is enabled, then the Receive T1 Framer block will
generate an interrupt when the Received LAPD message is more
than 276 Bytes in length.
0 - Disables the “SS7” interrupt within the LAPD Controller 1.
1 - Enables the “SS7” interrupt within the LAPD Controller 1.
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