TABLE
參數(shù)資料
型號： XRT86VL38IB484-F
廠商： Exar Corporation
文件頁數(shù)： 48/160頁
文件大?。?/td> 0K
描述： IC LIU/FRAMER T1/E1/J1 8CH 484BG
標準包裝： 60
控制器類型： T1/E1/J1 調(diào)幀器，LIU
電源電壓： 3.3V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 484-BGA
供應(yīng)商設(shè)備封裝： 484-STBGA（23x23）
包裝： 托盤
XRT86VL38
136
REV. V1.2.0
OCTAL T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
TABLE 113: LIU CHANNEL CONTROL INTERRUPT ENABLE REGISTER (LIUCCIER)
HEX ADDRESS: 0X0FN4
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
7
Reserved
RO
0
This Bit Is Not Used
6
DMOIE_n
R/W
0
Change of Transmit DMO (Drive Monitor Output) Condition Inter-
rupt Enable:
This bit permits the user to either enable or disable the “Change of
Transmit DMO Condition” Interrupt. If the user enables this interrupt,
then the XRT86VL38 device will generate an interrupt any time when
either one of the following events occur.
1. Whenever the Transmit Section toggles the DMO Status bit (Bit 6
or Register 0x0Fn5) to “1”.
2. Whenever the Transmit Section toggles the DMO Status bit (Bit 6
or Register 0x0Fn5) to “0”.
0 – Disables the “Change in the DMO Condition” Interrupt.
1 – Enables the “Change in the DMO Condition” Interrupt.
5
FLSIE_n
R/W
0
FIFO Limit Status Interrupt Enable:
This bit permits the user to either enable or disable the “FIFO Limit Sta-
tus” Interrupt. If the user enables this interrupt, then the XRT86VL38
device will generate an interrupt when the jitter attenuator Read/Write
FIFO pointers are within +/- 3 bits.
0 = Disables the “FIFO Limit Status” Interrupt
1 = Enables the “FIFO Limit Status” Interrupt
4
Reserved
-
This bit is not used.
3
NLCDIE_n
R/W
0
Change in Network Loop-Code Detection Interrupt Enable:
This bit permits the user to either enable or disable the “Change in Net-
work Loop-Code Detection” Interrupt. If the user enables this interrupt,
then the XRT86VL38 device will generate an interrupt any time when
either one of the following events occur.
1. Whenever the Receive Section (within XRT86VL38) detects the
Network Loop-Code (Loop-Up or Loop-Down depending on which
Loop-Code the Receive LIU is configured to detect).
2. Whenever the Receive Section (within XRT86VL38) no longer
detects
the
Network
Loop-Code
(Loop-Up
or
Loop-Down
depending on which Loop-Code the Receive LIU is configured to
detect).
0 – Disables the “Change in Network Loop-Code Detection” Interrupt.
1 – Enables the “Change in Network Loop-Code Detection” Interrupt.
2
Reserved
-
This bit is not used
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XRT86VL38IB-F 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 8-Ch T1/E1/J1 RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
XRT86VL38IB-F 制造商:Exar Corporation 功能描述:T1/E1 Framer Combo IC
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XRT86VL3X_07 制造商:EXAR 制造商全稱:EXAR 功能描述:T1/E1/J1 FRAMER/LIU COMBO - ARCHITECTURE DESCRIPTION
XRT86VL3X_0710 制造商:EXAR 制造商全稱:EXAR 功能描述:T1/E1/J1 FRAMER/LIU COMBO - ARCHITECTURE DESCRIPTION
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