TABLE
參數(shù)資料
型號(hào): XRT86VL38IB484-F
廠商: Exar Corporation
文件頁數(shù): 74/160頁
文件大?。?/td> 0K
描述: IC LIU/FRAMER T1/E1/J1 8CH 484BG
標(biāo)準(zhǔn)包裝: 60
控制器類型: T1/E1/J1 調(diào)幀器,LIU
電源電壓: 3.3V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 484-BGA
供應(yīng)商設(shè)備封裝: 484-STBGA(23x23)
包裝: 托盤
XRT86VL38
15
OCTAL T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
REV. V1.2.0
TABLE 4: GENERAL PURPOSE INPUT/OUTPUT 0 CONTROL REGISTER(GPIOCR0)
HEX ADDRESS: 0X0102
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
7-4
GPIO0_3DIR
GPIO0_2DIR
GPIO0_1DIR
GPIO0_0DIR
R/W
1111
GPIO0_3/GPIO0_2/GPIO0_1/GPIO0_0 Direction
These bits permit the user to define the General Purpose I/O Pins,
GPIO0_3/GPIO0_2/GPIO0_1/GPIO0_0 as either Input pins or Output
pins, as described below.
0 – Configures GPIO0_3/GPIO0_2/GPIO0_1/GPIO0_0 to function as
input pins.
1 – Configures GPIO0_3/GPIO0_2/GPIO0_1/GPIO0_0 to function as
output pins.
1. If GPIO0_3/GPIO0_2/GPIO0_1/GPIO0_0 are configured to
function as input pins, then the user can monitor the state of
these input pins by reading out the state of Bit 3-0 (GPIO0_3/
GPIO0_2/GPIO0_1/GPIO0_0) within this register.
2. If GPIO0_3/GPIO0_2/GPIO0_1/GPIO0_0 are configured to
function as output pins, then the user can control the state of
these output pins by writing the appropriate value into Bit 3-0
(GPIO0_3/GPIO0_2/GPIO0_1/GPIO0_0) within this register.
3-0
GPIO0_3
GPIO0_2
GPIO0_1
GPIO0_0
R/W
0000
GPIO0_3/GPIO0_2/GPIO0_1/GPIO0_0 Control
The exact function of this bit depends upon whether General Purpose I/
O Pins, GPIO0_3/GPIO0_2/GPIO0_1/GPIO0_0 have been configured
to function as input or output pins, as described below.
If GPIO0_3/GPIO0_2/GPIO0_1/GPIO0_0 are configured to function
as input pins:
If GPIO0_3/GPIO0_2/GPIO0_1/GPIO0_0 are configured to function as
input pins, then the user can monitor the state of the corresponding
input pin by reading out the state of these bits.
NOTE:
If GPIO0_3/GPIO0_2/GPIO0_1/GPIO0_0 are configured to
function as input pins, then writing to this particular register will
have no effect on the state of this pin.
If GPIO0_3/GPIO0_2/GPIO0_1/GPIO0_0 are configured to function
as output pins:
If GPIO0_3/GPIO0_2/GPIO0_1/GPIO0_0 are configured to function as
output pins, then the user can control the state of the corresponding
output pin by writing the appropriate value to these bits.
NOTE:
GPIO0_3/GPIO0_2/GPIO0_1/GPIO0_0 can be configured to
function as input or output pins, by writing the appropriate
value to Bit 7-4 (GPIO0_3DIR/GPIO0_2DIR/GPIO0_1DIR/
GPIO0_0DIR) within this register.
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