
XRT86L30
SINGLE T1/E1/J1 FRAMER/LIU COMBO
REV. P1.0.1
PRELIMINARY
49
T
ABLE
20: T
RANSMIT
S
IGNALING
AND
D
ATA
L
INK
S
ELECT
R
EGISTER
- E1 M
ODE
R
EGISTER
10 - E1 M
ODE
T
RANSMIT
S
IGNALING
AND
D
ATA
L
INK
S
ELECT
R
EGISTER
(TSDLSR) H
EX
A
DDRESS
:0
X
010A
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7
TxSa8ENB
R/W
0
Specifies if the Sa8 bit-field (bit 7 within timeslot 0 of non-FAS frames) will be
involved in the transport of Data Link Information
0 = Data Link Interface does not use Sa8 bit-field. Sa8 bit-field within each
outbound non-FAS frame will be set to 1.
1 = Data Link Interface uses Sa8 bit-field.
N
OTE
:
This bit-field is only active when the TxSIGDL[2:0] bits within this reg-
ister are set to 00x. This bit-field is ignored in all other case.
6
TxSa7ENB
R/W
0
Specifies if the Sa7 bit-field (bit 6 within timeslot 0 of non-FAS frames) will be
involved in the transport of Data Link Information
0 = Data Link Interface does not use Sa7 bit-field. Sa7 bit-field within each
outbound non-FAS frame will be set to 1.
1 = Data Link Interface uses Sa7 bit-field.
N
OTE
:
This bit-field is only active when the TxSIGDL[2:0] bits within this
register are set to 00x. This bit-field is ignored in all other cases.
5
TxSa6ENB
R/W
0
Specifies if the Sa6 bit-field (bit 5 within timeslot 0 of non-FAS frames) will be
involved in the transport of Data Link Information
outbound non-FAS frame will be set to 1.
1 = Data Link Interface uses Sa6 bit-field.
N
OTE
:
This bit-field is only active when the TxSIGDL[2:0] bits within this
register are set to 00x. This bit-field is ignored in all other case.
4
TxSa5ENB
R/W
0
Specifies if the Sa5 bit-field (bit 4 within timeslot 0 of non-FAS frames) will be
involved in the transport of Data Link Information
0 = Data Link Interface does not use Sa5 bit-field. Sa5 bit-field within each
outbound non-FAS frame will be set to 1.
1 = Data Link Interface uses Sa5 bit-field.
N
OTE
:
This bit-field is only active when the TxSIGDL[2:0] bits within this
register are set to 00x. This bit-field is ignored in all other case.
3
TxSa4ENB
R/W
0
Specifies if the Sa4 bit-field (bit 3 within timeslot 0 of non-FAS frames) will be
involved in the transport of Data Link Information
0 = Data Link Interface does not use Sa4 bit-field. Sa4 bit-field within each
outbound non-FAS frame will be set to 1.
1 = Data Link Interface uses Sa4 bit-field.
N
OTE
:
This bit-field is only active when the TxSIGDL[2:0] bits within this
register are set to 00x. This bit-field is ignored in all other case.
2
TxSIGDL(2)
R/W
0
These three Read/Write bits are used to specify the type of data that is to be
transported via D/E channel, National Bits in timeslot 0 of the non-FAS
frames, and Timeslot 16 in the outbound frames.
D/E Channel
0xx = Fractional Input
1xx = Serial Signaling Input
National Bits (Sa4-8)
000 = Data Link Data inserted into National bits
001 = Data Link Data inserted into National bits
010 = National bits forced to 1, not used to carry data link data
011 = None (forced to 1)
1xx = Data Link Data inserted into National bits
Timeslot 16
000 = Timeslot 16 is taken directly from PCM
001 = CAS Signaling bits A,B,C,D (per time slot)
010 = CCS Signaling bits A,B,C,D
011 = CAS Signaling bits A,B,C,D (per time slot)
1xx = Timeslot 16 is taken directly from PCM
1
TxSIGDL(1)
R/W
0
0
TxSIGDL(0)
R/W
0