
XRT86L30
SINGLE T1/E1/J1 FRAMER/LIU COMBO
PRELIMINARY
REV. P1.0.1
118
T
ABLE
132: D
ATA
L
INK
S
TATUS
R
EGISTER
2
R
EGISTER
546 D
ATA
L
INK
S
TATUS
R
EGISTER
2 (DLSR2) H
EX
A
DDRESS
: 0
X
0B16
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7
MSG TYPE
RUR
0
HDLC2 Message Type Identifier
Indicates type of data link message received by Rx HDLC2 Controller
0 = Bit Oriented Signaling type data link message received
1 = Message Oriented Signaling type data link message received
6
TxSOT
RUR
0
Transmit HDLC2 Start of Transmission Interrupt Status
Indicates if the Transmit HDLC2 Start of Transmission Interrupt has occurred
since the last read of this register. Transmit HDLC2 Controller will declare
this interrupt when it has started to transmit a data link message.
0 = Transmit HDLC2 Start of Transmission interrupt has not occurred since
the last read of this register
1 = Transmit HDLC2 Start of Transmission interrupt has occurred since the
last read of this register.
5
RxSOT
RUR
0
Receive HDLC2 Start of Reception Interrupt Status
Indicates if the Receive HDLC2 Start of Reception interrupt has occurred
since the last read of this register. Receive HDLC2 Controller will declare this
interrupt when it has started to receive a data link message.
0 = Receive HDLC2 Start of Reception interrupt has not occurred since the
last read of this register
1 = Receive HDLC2 Start of Reception interrupt has occurred since the last
read of this register
4
TxEOT
RUR
0
Transmit HDLC2 End of Transmission Interrupt Status
Indicates if the Transmit HDLC2 End of Transmission Interrupt has occurred
since the last read of this register. Transmit HDLC2 Controller will declare
this interrupt when it has completed its transmission of a data link message.
0 = Transmit HDLC2 End of Transmission interrupt has not occurred since
the last read of this register
1 = Transmit HDLC2 End of Transmission interrupt has occurred since the
last read of this register
3
RxEOT
RUR
0
Receive HDLC2 Controller End of Reception Interrupt Status
Indicates if Receive HDLC2 End of Reception Interrupt has occurred since
the last read of this register. Receive HDLC2 Controller will declare this inter-
rupt once it has completely received a full data link message.
0 = Receive HDLC2 End of Reception interrupt has not occurred since the
last read of this register
1 = Receive HDLC2 End of Reception Interrupt has occurred since the last
read of this register
2
FCS Error
RUR
0
FCS Error Interrupt Status
Indicates if the FCS Error Interrupt has occurred since the last read of this
register. Receive HDLC2 Controller will declare this interrupt if it detects an
error in the most recently received data message.
0 = FCS Error interrupt has not occurred since last read of this register
1 = FCS Error interrupt has occurred since last read of this register
1
Rx ABORT
RUR
0
Receipt of Abort Sequence Interrupt Status
Indicates if the Receipt of Abort interrupt has occurred since last read of this
register. Receive HDLC2 Controller will declare this interrupt if it detects a
string of seven (7) consecutive 1’s in the incoming data link channel.
0 = Receipt of Abort Sequence interrupt has not occurred since last read of
this register
1 = Receipt of Abort Sequence interrupt has occurred since last read of this
register