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參數(shù)資料
型號: XRT83VL38IB-F
廠商: Exar Corporation
文件頁數(shù): 49/95頁
文件大?。?/td> 0K
描述: IC LIU SH T1/E1/J1 OCTAL 225BGA
標(biāo)準(zhǔn)包裝: 84
類型: 線路接口裝置(LIU)
驅(qū)動器/接收器數(shù): 8/8
規(guī)程: E1
電源電壓: 3.14 V ~ 3.47 V
安裝類型: 表面貼裝
封裝/外殼: 225-BGA
供應(yīng)商設(shè)備封裝: 225-BGA(19x19)
包裝: 托盤
其它名稱: 1016-1481
XRT83VL38IB-F-ND
XRT83VL38
49
REV. 1.0.1
OCTAL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
THE MICROPROCESSOR INTERFACE BLOCK SIGNALS
The LIU may be configured into different operating modes and have its performance monitored by software
through a standard microprocessor using data, address and control signals.
These interface signals are
described below in Table 16, Table 17, and Table 18. The microprocessor interface can be configured to
operate in Intel mode or Motorola mode. When the microprocessor interface is operating in Intel mode, some
of the control signals function in a manner required by the Intel 80xx family of microprocessors. Likewise, when
the microprocessor interface is operating in Motorola mode, then these control signals function in a manner as
required by the Motorola microprocessors.
(For using a Motorola 68K asynchronous
processor, see
Figure 30 and Table 20) Table 16 lists and describes those microprocessor interface signals whose role is
constant across the two modes. Table 17 describes the role of some of these signals when the microprocessor
interface is operating in the Intel mode. Likewise, Table 18 describes the role of these signals when the
microprocessor interface is operating in the Motorola Power PC mode.
FIGURE 28. SIMPLIFIED BLOCK DIAGRAM OF THE MICROPROCESSOR INTERFACE BLOCK
TABLE 16: XRT83VL38 MICROPROCESSOR INTERFACE SIGNALS THAT EXHIBIT CONSTANT ROLES IN BOTH INTEL
AND
MOTOROLA MODES
PIN NAME
TYPE
DESCRIPTION
PTS[2:1]
I
Microprocessor Interface Mode Select Input pins
These two pins are used to specify the microprocessor interface mode. The relationship
between the state of these two input pins, and the corresponding microprocessor mode is pre-
sented in
DATA[7:0]
I/O
Bi-Directional Data Bus for register "Read" or "Write" Operations.
ADDR[7:0]
I
Eight-Bit Address Bus Inputs
The XRT83VL38 LIU microprocessor interface uses a direct address bus. This address bus is
provided to permit the user to select an on-chip register for Read/Write access.
CS
I
Chip Select Input
This active low signal selects the microprocessor interface of the XRT83VL38 LIU and
enables Read/Write operations with the on-chip register locations.
Microprocessor
Interface
WR_R/W
RD_DS
ALE
PTS [2:1]
RDY
Reset
CS
INT
ADDR[7:0]
DATA[7:0]
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